TP3420AV datasheet(24/32 Pages) NSC

24 / 32 page

Absolute Maximum Ratings (Note 24)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

CC to GND

Voltage at L

i,L0

CC +1V to GND −1V

Voltage at any Digital Input

CC +1V to GND −1V

Storage Temperature Range

−65˚C to+150˚C

Current at L

±100 mA

Current at any Digital Output

±50 mA

Lead Temperature

(Soldering, 10 sec.)

300˚C

ESD rating

2000V

Electrical Characteristics

Unless otherwise noted: limits printed in bold characters are electrical testing limits at V

CC = 5.0V and TA = 25˚C. All other

limits are design goals for V

CC = 5.0V ±5%, and TA = 0˚C to 70˚C. This data sheet is still preliminary and parameter limits

are subject to change based on further characterization testing.

Symbol

Parameter

Conditions

Limits

Units

Min

Typ

Max

DIGITAL INTERFACES

Input Low Voltage

All Digital Inputs

0.7

Input High Voltage

All Digital Inputs

2.2

ILX

Input Low Voltage

MCLK/XTAL Input

0.5

IHX

Input High Voltage

MCLK/XTAL Input

CC − 0.5

Output Low Voltage

r,IL = 3.2 mA

0.4

All Other Digital Outputs, I

L = 1mA

Output High Voltage

r,IL = −3.2 mA

2.4

All Other Digital Outputs, I

L = −1 mA

2.4

All Outputs, I

L = −100 µA

CC − 0.5

Input Current

Any Digital Input, GND < V

IN < VCC

−10

µA

Output Current in High

r, INT, LSD, CO

−10

µA

Impedance State

(TRI-STATE)

GND < V

OUT < VCC

LINE INTERFACES

Differential Input

GND < L

i+, Li− < VCC

200

Ω

Resistance

Load Capacitance

Between L

o+ and Lo−

200

POWER DISSIPATION

CC0

Power Down Current

All Outputs Open-Circuit

1.20

CC1

Power Up Current

As Above, Device Deactivated (Note 25)

TRANSMISSION PERFORMANCE

Transmit Pulse Amplitude

L = 270Ω Between Lo+ and Lo− (Note 26)

±1.90

±2.14

Vpk

Transmit Pulse Unbalance

0+ Relative to 0−

±5

Input Pulse Amplitude

Differential Between L

i+ and Li−

±175

mVpk

Output Impedance when

Ω Load

100

Ω

Transmitting Binary Zeroes

400

Ω Load (Note 27)

Ω

Note 24: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits.

Note 25: When the device is activated and driving a correctly terminated line, ICC1 increases by several mA. A worst-case data pattern, consisting of all binary 0’s,

increases ICC1 by approximately 8 mA.

Note 26: The pulse amplitude at the Lo± pins allows for approximately 1 dB transformer insertion loss to meet the 0.75V pulse mask test when the line is terminated

in 50

Ω.

Note 27: Using a 2:1 PE64995 transformer and a connecting cord. See AN-872 (TP3420A Line Interface or Circuit Considerations) for more details.

TP3420AV 数据表(PDF) 24 Page - National Semiconductor (TI)

TP3420AV 数据表(HTML) 24 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

数据表下载