TP3420AV datasheet(28/32 Pages) NSC

28 / 32 page

Definitions and Timing

Conventions (Continued)

OL is the maximum d.c. output level to

which an output placed in a logical zero

state will converge when loaded at the

maximum specified load current.

Threshold Region The threshold region is the range of in-

put voltages between V

IL and VIH.

Valid Signal

A signal is Valid if it is in one of the valid

logic states, (i.e. above V

IH or below

IL). In timing specifications, a signal is

deemed valid at the instant it enters a

valid state.

Invalid Signal

A signal is Invalid if it is not in a valid

logic state, i.e. when it is in the threshold

region between V

IL and VIH. In timing

specifications, a signal is deemed invalid

at the instant it enters the threshold re-

gion.

TIMING CONVENTIONS

For the purposes of this timing specification the following

conventions apply:

Input Signals

All input signals may be characterized

as: V

L = 0.4V, VH = 2.4V, tR < 10 ns,

F < 10 ns.

Period

The period of clock signal is designated

as t

Pxxwhere

xx represents the mne-

monic of the clock signal being specified.

Rise Time

Rise times are designated as t

Ryy, where

yy represents a mnemonic of the signal

whose rise time is being specified. t

Ryy is

measured from V

IL to VIH.

Fall Time

Fall times are designated as t

Fyy, where

yy represents a mnemonic of the signal

whose fall time is being specified. t

Fyy is

measured from V

IH to VIL.

Pulse Width High The high pulse width is designated as

WzzH,

where zz represents the mne-

monic of the input or output signal whose

pulse width is being specified. High

pulse widths are measured from V

IH to

IH.

Pulse Width Low

The low pulse width is designated as

WzzL,

where zz represents the mne-

monic of the input or output signal whose

pulse width is being specified. Low pulse

widths are measured from V

IL to VIL.

Setup Time

Setup times are designated as t

Swwxx,

where ww represents the mnemonic of

the input signal whose setup time is be-

ing specified relative to a clock or strobe

input represented by mnemonic xx.

Setup times are measured from the ww

Valid to xx Invalid.

Hold Time

Hold times are designated as t

Hxxww,

where ww represents the mnemonic of

the input signal whose hold time is being

specified relative to a clock or strobe in-

put represented by mnemonic xx. Hold

times are measured from xx Valid to ww

Invalid.

Delay Time

Delay

times

are

designated

Dxxyy[

|H|L], where xx represents the

mnemonic of the input reference signal

and yy represents the mnemonic of the

output signal whose timing is being

specified relative to xx. The mnemonic

may optionally be terminated by an H or

L to specify the high going or low going

transition of the output signal. Maximum

delay times are measured from xx Valid

to yy Valid. Minimum delay times are

measured from xx Valid to yy Invalid.

This parameter is tested under the load

conditions specified in the Conditions

column of the Timing Specifications sec-

tion of this data sheet.

Appendix A

FIRMWARE GUIDELINES FOR HANDLING SC1/Q AND

SC2 MAINTENANCE MESSAGES

This application note describes software guidelines that

make use of TP3420A hardware features designed to sup-

port the handling of the newly defined maintenance channels

SC1/Q and SC2. Please refer to the TP3420A datasheet and

the T1.605-1991 specification for explanations of the SC1/Q

and SC2 messages.

SC1 TRANSMITTER CONTROL IN NT UNIT

The microcontroller software must keep a list of flags for SC1

messages of lower priority that need to be sent for 6 frames,

in the following priority order as they occur: ST reports, LB

indications, LRS, DOI, IDLE. These messages should be

sent through the MFT1L register. The software should also

keep a list of flags for the high priority messages that have to

be sent once in the following priority order: LP, FECV, and

DTSE commands. These messages should be sent through

the MFT1H register. As part of the TP3420A initialization, the

software should write the MFC6E command to cause the de-

vice to generate the MFC interrupt every 30 ms, and this in-

terrupt status should be used to synchronize the SC1L and

any SC2 messages.

Events and conditions that cause SC1 messages to be gen-

erated arise from 3 different sources, the S interface loop,

the U interface loop or from within the NT unit itself. S Loop

conditions can cause the RMFE indication to indicate a code

violation that must be reported to the TE by the FECV mes-

sage. U loop conditions are communicated to the TE by the

LRS, DOI and the DTSE messages. The NT local microcon-

troller will generate the messages for the ST reports, LB in-

dications, LP and the IDLE.

Each 30 ms tick, the software should service the list of flags

and go down the priority chain. The command (for MFT1L

MFT1L register and the flag is reset. The MFT1L commands

may be updated at every 30 ms tick if any of the relevant

flags are set. If a DTSE interrupt is received from the U inter-

face, this command is immediately loaded into the MFT1H

sponded with a FECV command through the MFT1H register

immediately. A double buffer has been implemented in the

MFT1H register to ensure that 2 commands can be queued

and each will be sent for 1 multiframe. The device has 2 4-bit

TP3420AV 数据表(PDF) 28 Page - National Semiconductor (TI)

TP3420AV 数据表(HTML) 28 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

数据表下载