TP3420AV datasheet(17/32 Pages) NSC

17 / 32 page

Functional Description (Continued)

0 is being received, the loop is de-activated, Status Indica-

tion type DI is set and the INT output pulled low to indicate

De-activation.

I.430 does not provide for Deactivation to be initiated by a

TE. However, a Power-down state may be forced if required,

normally after Deactivation has been established by the net-

work.

If required, an external Timer 3 should be started when an

Activation Request is sent to the TP3420. The subsequent AI

interrupt, indicating Activation is complete, should be used to

stop the timer. If the timer expires before an AI is generated,

Control Instruction type DR must be written to the device to

force the transmission of INFO 0.

TE MODE D-CHANNEL ACCESS

In TE Master mode and optionally in TES mode, the

TP3420A SID arbitrates access for Layer 2 Transmit frames

to the D-channel bit positions in accordance with the I.430

Priority Mechanism (I.430 Section 6.1). This mechanism is to

resolve contention for the D channel towards the network

when 2 or more TEs are connected to a Passive Bus. The

shifting of D-channel transmit data from the Layer 2 device

into the SID buffer is controlled by gating the DEN

x output

with BCLK. When no Layer 2 frame is pending, “1”s are al-

ways transmitted by the SID in D-bit positions at the S inter-

face. DEN

x output pulses are inhibited and no D-channel

data is shifted into the B

x input. An external Layer 2 device

requiring to start transmission of a packet should first prime

its Transmit buffer such that the opening flag is ready to be

shifted across the digital interface. Then a DREQ command

will initiate the D-channel access sequence. DREQ com-

mands require either that a Priority Class 1 (signalling)

packet, or a Priority Class 2 packet, is selected.

In response to the DREQ command, the DEN

x output is en-

abled to pre-fetch the opening flag from the Layer 2 device

into the D-channel buffer. (Note: it is not necessary to flush

the Layer 2 HDLC transmitter prior to clocking out the open-

ing flag; the TP3420A will continue the pre-fetch until the flag

is uniquely recognized.) Meanwhile, the Priority Counter

checks that no other TE connected to the S interface (in a

point-to-multipoint wiring configuration) is transmitting in the

D-channel. This is assured by counting consecutive “1”s in

the E-bit position of frames received from the NT. At least 8

consecutive “1”s must be detected before transmission of

the pending D-channel frame begins, in accordance with

Table 7.

TABLE 7. D-Channel Access Criteria

Number of

Consecutive

D-Channel Access

“1”s in the

E-Channel

Abort. Possible re-try by

the transmitting TE.

Signalling packet (Priority

Class 1) may begin (Note 13).

Signalling packet may begin

unconditionally.

Any packet type may begin

(Priority Class 2) (Note 14).

Number of

Consecutive

D-Channel Access

“1”s in the

E-Channel

Any packet type may

begin unconditionally

Note 13: Only if, since the SID last transmitted a complete Class 1 packet, a

sequence of

≥ 9 consecutive “1”s has been detected in the E-channel.

Note 14: Only if, since the SID last transmitted a complete packet of either

class, a sequence of

≥ 11 consecutive “1”s has been detected in the

E-channel.

If another TE is active in the D-channel, DEN

x pulses are in-

hibited once the opening flag is in the Transmit buffer, to pre-

vent further fetching of transmit data from the Layer 2 device

until D-channel access is achieved. As soon as the required

number of consecutive E-channel “1”s has been counted,

the leading 0 of the opening flag is transmitted in the next

D-bit position towards the NT. DEN

pulses are also

re-enabled in order to shift D-channel bits from the Layer 2

device into the SID transmit buffer. No interrupts are neces-

sary for local flow control between the Layer 2 processor and

the TP3420.

During transmission in the D-channel the TP3420A SID con-

tinues to compare each E-bit received from the NT with the

D-channel bit previously transmitted before proceeding to

send the next D-bit. In the event of a mis-match, a contention

for the previous D-bit is assumed to have been won by an-

other TE. Transmission of the current packet therefore

ceases and “1”s are transmitted in all following D-bit posi-

tions. Status Indication type CON is set, and the INT output

is pulled low to interrupt the Layer 2 transmit processor.

DEN

x output pulses are again inhibited.

In order to retransmit the lost packet, the Layer 2 device

must begin as before, by priming its Transmit buffer with the

packet header and writing a DREQ command into the Con-

trol Register.

DEN

x pulses stop immediately after receiving the closing

flag on the B

x input from the layer 2 device.

Successful completion of a transmit packet is detected by

the TP3420A when the closing flag is transmitted in the D

channel. “1”s are then transmitted in the following D bit posi-

tions. The INT output is pulled Low (if enabled), with Status

Indication type EOM set, to indicate the End of Message.

Also, the Priority Access counters are decremented to the

lower priority level within each priority class, in accordance

with the I.430 algorithm. Priority is subsequently restored to

the higher level when the specified number of consecutive

1’s (9 or 11) is detected in the D-echo-bit position.

D-CHANNEL ACCESS ALGORITHM IN TES MODE

Two MICROWIRE commands in the TP3420A provide the

option of enabling or disabling the D channel access algo-

rithm, for Passive Bus applications while in the TES and

TEM mode. An example of this would be for support of pas-

sive bus off a PBX trunk line. The commands are DACCE

(Access Algorithm Enable) and DACCD (Access Algorithm

Disable). The power-up default condition for TES mode is to

disable the D channel access mechanism, and for TEM

mode is to enable the D channel access mechanism.

ECHO-BIT CONTROL IN NT MODE

For certain applications it is desirable to be able to control

the E-bit sent from the NT device towards the TE. Three MI-

CROWIRE commands are provided to control this. The

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