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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HT66F4530 数据表(PDF) 146 Page - Holtek Semiconductor Inc |
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HT66F4530 数据表(HTML) 146 Page - Holtek Semiconductor Inc |
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146 / 224 page  Rev. 1.00 14� De�e��e� �1� �01� Rev. 1.00 147 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers I2C Bus Start Signal TheSTARTsignalcanonlybegeneratedbythemasterdeviceconnectedtotheI2Cbusandnotby theslavedevice.ThisSTARTsignalwillbedetectedbyalldevicesconnectedtotheI2Cbus.When detected,thisindicatesthattheI2CbusisbusyandthereforetheHBBbitwillbeset.ASTART conditionoccurswhenahightolowtransitionontheSDAlinetakesplacewhentheSCLline remainshigh. I2C Slave Address ThetransmissionofaSTARTsignalbythemasterwillbedetectedbyalldevicesontheI2Cbus. Todeterminewhichslavedevicethemasterwishestocommunicatewith,theaddressoftheslave devicewillbesentoutimmediatelyfollowingtheSTARTsignal.Allslavedevices,afterreceiving this7-bitaddressdata,willcompareitwiththeirown7-bitslaveaddress.Iftheaddresssentoutby themastermatchestheinternaladdressofthemicrocontrollerslavedevice,thenaninternalI2Cbus interruptsignalwillbegenerated.Thenextbitfollowingtheaddress,whichisthe8thbit,defines theread/writestatusandwillbesavedtotheSRWbitoftheSIMC1register.Theslavedevicewill thentransmitanacknowledgebit,whichisalowlevel,asthe9thbit.Theslavedevicewillalsoset thestatusflagHAASwhentheaddressesmatch. AsanI2Cbusinterruptcancomefromthreesources,whentheprogramenterstheinterrupt subroutine,theHAASandSIMTOFbitsshouldbeexaminedtoseewhethertheinterruptsource hascomefromamatchingslaveaddressorfromthecompletionofadatabytetransferortheI2C bustime-outoccurrence.Whenaslaveaddressismatched,thesedevicesmustbeplacedineither thetransmitmodeandthenwritedatatotheSIMDregister,orinthereceivemodewhereitmust implementadummyreadfromtheSIMDregistertoreleasetheSCLline. I2C Bus Read/Write Signal TheSRWbitintheSIMC1registerdefineswhetherthemasterdevicewishestoreaddatafromthe I2CbusorwritedatatotheI2Cbus.Theslavedeviceshouldexaminethisbittodetermineifitisto beatransmitterorareceiver.IftheSRWflagis"1"thenthisindicatesthatthemasterdevicewishes toreaddatafromtheI2Cbus,thereforetheslavedevicemustbesetuptosenddatatotheI2Cbusas atransmitter.IftheSRWflagis"0"thenthisindicatesthatthemasterwishestosenddatatotheI2C bus,thereforetheslavedevicemustbesetuptoreaddatafromtheI2Cbusasareceiver. I2C Bus Slave Address Acknowledge Signal Afterthemasterhastransmittedacallingaddress,anyslavedeviceontheI2Cbus,whose owninternaladdressmatchesthecallingaddress,mustgenerateanacknowledgesignal.The acknowledgesignalwillinformthemasterthataslavedevicehasaccepteditscallingaddress.Ifno acknowledgesignalisreceivedbythemasterthenaSTOPsignalmustbetransmittedbythemaster toendthecommunication.WhentheHAASflagishigh,theaddresseshavematchedandtheslave devicemustchecktheSRWflagtodetermineifitistobeatransmitterorareceiver.IftheSRWflag ishigh,theslavedeviceshouldbesetuptobeatransmittersotheHTXbitintheSIMC1register shouldbesetto"1".IftheSRWflagislow,thenthemicrocontrollerslavedeviceshouldbesetupas areceiverandtheHTXbitintheSIMC1registershouldbesetto"0". |
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