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HT66F4530 数据表(PDF) 150 Page - Holtek Semiconductor Inc |
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HT66F4530 数据表(HTML) 150 Page - Holtek Semiconductor Inc |
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150 / 224 page  Rev. 1.00 150 De�e��e� �1� �01� Rev. 1.00 151 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers UART Interface – HT66F4540/HT66F4550 Thesedevicescontainanintegratedfull-duplexasynchronousserialcommunicationsUART interfacethatenablescommunicationwithexternaldevicesthatcontainaserialinterface.The UARTfunctionhasmanyfeaturesandcantransmitandreceivedataseriallybytransferringaframe ofdatawitheightorninedatabitspertransmissionaswellasbeingabletodetecterrorswhenthe dataisoverwrittenorincorrectlyframed.TheUARTfunctionpossessesitsowninternalinterrupt whichcanbeusedtoindicatewhenareceptionoccursorwhenatransmissionterminates. TheintegratedUARTfunctioncontainsthefollowingfeatures: • Full-duplex,asynchronouscommunication • 8or9bitscharacterlength • Even,oddornoparityoptions • Oneortwostopbits • Baudrategeneratorwith8-bitprescaler • Parity,framing,noiseandoverrunerrordetection • Supportforinterruptonaddressdetect(lastcharacterbit=1) • Separatelyenabledtransmitterandreceiver • 2-byteDeepFIFOReceiveDataBuffer • Transmitandreceiveinterrupts • Interruptscanbeinitializedbythefollowingconditions: ♦ TransmitterEmpty ♦ TransmitterIdle ♦ ReceiverFull ♦ ReceiverOverrun ♦ AddressModeDetect ♦ RXpinwake-upfunction MSB LSB ………………………… T�ans�itte� Shift Registe� (TSR) MSB LSB ………………………… Re�eive� Shift Registe� (RSR) TX Pin RX Pin Baud Rate Gene�ato� TXR_RXR Registe� TXR_RXR Registe� Data to �e t�ans�itted Data �e�eived Buffe� fH MCU Data Bus UART Data Transfer Block Diagram |
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