DOC4106 datasheet(5/47 Pages) ATMEL

5 / 47 page

AT8xC51SND1C

4106F–8051–10/02

P2.7:0

I/O

Port 2

P2 is an 8-bit bi-directional I/O port with internal pull-ups.

A15:8

P3.7:0

I/O

Port 3

P3 is an 8-bit bi-directional I/O port with internal pull-ups.

RXD

TXD

INT0

INT1

P4.7:0

I/O

Port 4

P4 is an 8-bit bi-directional I/O port with internal pull-ups.

MISO

MOSI

SCK

P5.3:0

I/O

Port 5

P5 is a 4-bit bi-directional I/O port with internal pull-ups.

Table 2. Clock Signal Description

Signal

Name

Type

Description

Alternate

Function

Input to the on-chip inverting oscillator amplifier

To use the internal oscillator, a crystal/resonator circuit is connected to

this pin. If an external oscillator is used, its output is connected to this

pin. X1 is the clock source for internal timing.

Output of the on-chip inverting oscillator amplifier

To use the internal oscillator, a crystal/resonator circuit is connected to

this pin. If an external oscillator is used, leave X2 unconnected.

FILT

PLL low pass filter input

FILT receives the RC network of the PLL low pass filter.

Table 3. Timer 0 and Timer 1 Signal Description

Signal

Name

Type

Description

Alternate

Function

INT0

Timer 0 Gate Input

INT0 serves as external run control for timer 0, when selected by

GATE0 bit in TCON register.

External Interrupt 0

INT0 input sets IE0 in the TCON register. If bit IT0 in this register is set,

bit IE0 is set bya fallingedgeonINT0.Ifbit IT0 is cleared,bit IE0 is set

by a low level on INT0.

P3.2

INT1

Timer 1 Gate Input

INT1 serves as external run control for timer 1, when selected by

GATE1 bit in TCON register.

External Interrupt 1

INT1 input sets IE1 in the TCON register. If bit IT1 in this register is set,

bit IE1 is set bya fallingedgeonINT1.Ifbit IT1 is cleared,bit IE1 is set

by a low level on INT1.

P3.3

Table 1. Ports Signal Description (Continued)

Signal

Name

Type

Description

Alternate

Function

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