数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

DOC4106 数据表(PDF) 7 Page - ATMEL Corporation

部件名 DOC4106
功能描述  Single-Chip Microcontroller with MP3 Decoder and Man-Machine Interface
PDF  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

DOC4106 数据表(HTML) 7 Page - ATMEL Corporation

Back Button DOC4106 Datasheet HTML 3Page - ATMEL Corporation DOC4106 Datasheet HTML 4Page - ATMEL Corporation DOC4106 Datasheet HTML 5Page - ATMEL Corporation DOC4106 Datasheet HTML 6Page - ATMEL Corporation DOC4106 Datasheet HTML 7Page - ATMEL Corporation DOC4106 Datasheet HTML 8Page - ATMEL Corporation DOC4106 Datasheet HTML 9Page - ATMEL Corporation DOC4106 Datasheet HTML 10Page - ATMEL Corporation DOC4106 Datasheet HTML 11Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 47 page
background image
7
AT8xC51SND1C
4106F–8051–10/02
Table 7. UART Signal Description
Signal
Name
Type
Description
Alternate
Function
RXD
I/O
Receive Serial Data
RXD sends and receives data in serial I/O mode 0 and receives data in
serial I/O modes 1, 2 and 3.
P3.0
TXD
O
Transmit Serial Data
TXD outputs the shift clock in serial I/O mode 0 and transmits data in
serial I/O modes 1, 2 and 3.
P3.1
Table 8. SPI Controller Signal Description
Signal
Name
Type
Description
Alternate
Function
MISO
I/O
SPI Master Input Slave Output Data Line
When in master mode, MISO receives data from the slave peripheral.
When in slave mode, MISO outputs data to the master controller.
P4.0
MOSI
I/O
SPI Master Output Slave Input Data Line
When in master mode, MOSI outputs data to the slave peripheral.
When in slave mode, MOSI receives data from the master controller.
P4.1
SCK
I/O
SPI Clock Line
When in master mode, SCK outputs clock to the slave peripheral. When
in slave mode, SCK receives clock from the master controller.
P4.2
SS
I
SPI Slave Select Line
When in controlled slave mode, SS enables the slave mode.
P4.3
Table 9. TWI Controller Signal Description
Signal
Name
Type
Description
Alternate
Function
SCL
I/O
TWISerialClock
When TWI controller is in master mode, SCL outputs the serial clock to
the slave peripherals. When TWI controller is in slave mode, SCL
receives clock from the master controller.
P1.6
SDA
I/O
TWISerialData
SDA is the bi-directional TWI data line.
P1.7
Table 10. A/D Converter Signal Description
Signal
Name
Type
Description
Alternate
Function
AIN1:0
I
A/D Converter Analog Inputs
-
AREFP
I
Analog Positive Voltage Reference Input
-
AREFN
I
Analog Negative Voltage Reference Input
This pin is internally connected to AVSS.
-



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com