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IC-HT 数据表(PDF) 19 Page - IC-Haus GmbH |
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IC-HT 数据表(HTML) 19 Page - IC-Haus GmbH |
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19 / 45 page ![]() prel imin ary prel imin ary iC-HT DUAL CW LASER DIODE DRIVER Rev B1, Page 19/45 EOC1 Addr. 0x10; bit 4 R/W 1 0 Channel 1 regulator offset compensation disabled 1 Channel 1 regulator offset compensation enabled Table 35: Enable offset compensation channel 1 EOC2 Addr. 0x15; bit 4 R/W 1 0 Channel 2 regulator offset compensation disabled 1 Channel 2 regulator offset compensation enabled Table 36: Enable offset compensation channel 2 An internal oscillator is used for the offset compensa- tion. A watchdog timer (WDT) is included in order to monitor proper function of the oscillator. If an error is detected by the WDT, the laser channels are dis- abled, OSCERR error bit is set in STATUS0 register and the error event is signaled at pin NCHK. This error signaling can be suppressed using the mask register bit MOSCERR (set to 1). MOSCERR Addr. 0x1D; bit 0 R/W 0 0 Oscillator error (watchdog) will be signaled at NCHK 1 Oscillator error (watchdog) will not be signaled at NCHK Table 37: Oscillator error mask iC-HT monitors the saturation voltage of the regula- tor´s output transistor at pin LDKx. The LDK satura- tion threshold can be configured through register bits RLDKSx. RLDKS1 Addr. 0x13; bit 3:2 R/W 00 00 V(LDK1) < 0.5 V sets the LDKSAT1 alarm bit 01 V(LDK1) < 0.8 V sets the LDKSAT1 alarm bit 10 V(LDK1) < 1.0 V sets the LDKSAT1 alarm bit 11 V(LDK1) < 1.2 V sets the LDKSAT1 alarm bit Table 38: LDK saturation threshold selection channel 1 RLDKS2 Addr. 0x18; bit 3:2 R/W 00 00 V(LDK2) < 0.5 V sets the LDKSAT2 alarm bit 01 V(LDK2) < 0.8 V sets the LDKSAT2 alarm bit 10 V(LDK2) < 1.0 V sets the LDKSAT2 alarm bit 11 V(LDK2) < 1.2 V sets the LDKSAT2 alarm bit Table 39: LDK saturation threshold selection channel 2 If the LDKx voltage falls below the LDK saturation threshold the LDKSATx error bit in STATUS1 register will be set and it will be signaled through output pin NCHK. Setting the mask register bit MLDKSATx to 1 suppresses the signaling at NCHK. MLDKSAT1 Addr. 0x1D; bit 2 R/W 1 0 LDKSAT1 event will be signaled at NCHK 1 LDKSAT1 event will not be signaled at NCHK Table 40: LDK saturation mask channel 1 MLDKSAT2 Addr. 0x1D; bit 3 R/W 1 0 LDKSAT2 event will be signaled at NCHK 1 LDKSAT2 event will not be signaled at NCHK Table 41: LDK saturation mask channel 2 Laser channel enabling and error handling With pin INS/WKR or EMC unconnected, a corre- sponding error signal will be generated (INSOPEN, EMCOPEN) and will disable the laser channels. Any input interface could be enabled if EMC or INS pins are open. Comunication with the chip might be possi- ble but laser cannot be switched on. This situation is only signaled at the MCU interruption pin NCHK, which would remain low as long as any of the EMC or INS pins are unconnected. MCU must monitor the status of the NCHK pin to get all the status information of the chip Setting DISC1 and DISC2 to 1(default) disables the corresponding channel. The errors in STATUS0 and STATUS1 registers disable the laser channels. Every change in the STATUS reg- isters is signaled at pin NCHK, unless the error event is masked by the corresponding error mask bit. |
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