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IC-HT 数据表(PDF) 25 Page - IC-Haus GmbH |
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IC-HT 数据表(HTML) 25 Page - IC-Haus GmbH |
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25 / 45 page  prel imin ary prel imin ary iC-HT DUAL CW LASER DIODE DRIVER Rev B1, Page 25/45 8 BIT INTERNAL PROGRAMMABLE LOGARITHMIC MONITOR RESISTORS In MCU mode internal 8 bit programmable logarithmic monitor resistors (PLRx) are provided for APC. The resistor value can be selected from 256 values, ranging from 100 Ω to 500 kΩ, following logarithmic in- crements with a typical step width of 3.3%. The resis- tors are configured with registers RMDx(7:0). RMD1 Addr. 0x12; bit 7:0 R/W 0xFF 0x00 PLR1 set to the minimum resistance . . . PLR1 set to Rmd = Rmd0(1 + ∆ Rmd (%) 100 )n+1, n from 0 to 255 0xFF PLR1 resistor set to the maximum resistance Table 48: MDA resistor channel 1 RMD2 Addr. 0x17; bit 7:0 R/W 0xFF 0x00 PLR2 resistor set to the minimum resistance . . . PLR2 set to Rmd = Rmd0(1 + ∆ Rmd (%) 100 )n+1, n from 0 to 255 0xFF PLR2 resistor set to the maximum resistance Table 49: MDA resistor channel 2 The following formula calculates the register RMDx in order to set the desired resistor value: Rmd = Rmd0(1 + ∆ Rmd (%) 100 )n+1, n from 0 to 255 Where Rmd0 is the minimum resistor value (typically 100 Ω), ∆ Rmd (%) is the step between two consecu- tive resistor values (typically 3.3%) and n is the value of RMDx register in decimal. In APC mode the regulation node is the internal con- nection to PLR, it is not MDAx pin. Voltage present at pin MDAx may differ from the internal regulation node. This regulation node can be sensed through the 10 bit A/D converter and read at register ADCx. Register bit ADSNFx must be set to 1 for this purpose. If ADSNFx is set to 0, MDAx pin will be the input of the A/D con- verter. At pin MDAx only the 4 MSB of the RMDx configu- ration from PLRx are measurable. The 8 bits of the PLRx configuration RMDx can be measured with the A/D converter setting ADSNFx to 1. The PLRx can be disabled using register bit DISPx. With DISPx = 0 the PLRx is enabled and DISPx = 1 disables the PLRx. DISP1 Addr. 0x10; bit 2 R/W 0 0 PLR enabled for channel 1 1 PLR disabled for channel 1 Table 50: Disable PLR channel 1 DISP2 Addr. 0x15; bit 2 R/W 0 0 PLR enabled for channel 2 1 PLR disabled for channel 2 Table 51: Disable PLR channel 2 R 8 Bit LASER CHANNEL 1 10 Bit A D 8 Bit A D 10 Bit PLR1 APC ..10 nF.. A D N I LDK + - 0 255 CI1 MRL1 MDA1 CIL1 CI1 LDK1 DCO ECIE1 VB VDD LDK1 ADSNF1 DISP1 EMC AGND1 N I LDK CI1 Figure 15: PLR in APC In ACC mode the PLR is not used in the control cir- cuit. Instead, the internal RACCx resistor is used in the control loop. Even though the PLR is not in the control circuit, it can be enabled (DISPx = 0) in order to give feedback through the 10 bit A/D converter for the controlling light power if a monitor diode is connected. Register bit ADSNF is set to 1 to measure the internal sense node. Alternatively, an external monitor resistor can be used to measure the optical power, by setting DISPx to 1. Then register bit ADSNF must be set to 0 in order to measure directly at pin MDAx. |
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