80960JD datasheet(32/59 Pages) INTEL

32 / 59 page

80960JD

PRODUCT PREVIEW

4.7

AC Specifications

The 80960JD AC timings are based upon device characterization.

Table 16. 80960JD AC Characteristics (Sheet 1 of 2)

Symbol

Parameter

Min

Max

Units

Notes

INPUT CLOCK TIMINGS

CLKIN Frequency

80960JD-66

80960JD-50

80960JD-40

33.3

MHz

CLKIN Period

80960JD-66

80960JD-50

80960JD-40

83.3

TCS

CLKIN Period Stability

± 250

(1, 2)

TCH

CLKIN High Time

Measured at 1.5 V (1)

TCL

CLKIN Low Time

Measured at 1.5 V (1)

TCR

CLKIN Rise Time

0.8 V to 2.0 V (1)

TCF

CLKIN Fall Time

2.0 V to 0.8 V (1)

SYNCHRONOUS OUTPUT TIMINGS

TOV1

Output Valid Delay, Except ALE/ALE

Inactive and DT/R for 3.3V input sig-

nals.

Same as above, but for 5.5V input

signals.

2.5

13.5

16.5

(3)

TOV2

Output Valid Delay, DT/R

0.5TC + 7

0.5TC +

TOF

Output Float Delay

2.5

13.5

(4)

SYNCHRONOUS INPUT TIMINGS

TIS1

Input Setup to CLKIN — AD31:0,

NMI

, XINT7:0

6ns

(5)

TIH1

Input Hold from CLKIN — AD31:0,

NMI

, XINT7:0

1.5

(5)

TIS2

Input Setup to CLKIN — RDYRCV

and HOLD

6.5

(6)

TIH2

Input Hold from CLKIN — RDYRCV

and HOLD

1ns

(6)

TIS3

Input Setup to CLKIN — RESET

7ns

(7)

TIH3

Input Hold from CLKIN — RESET

2ns

(7)

TIS4

Input Setup to RESET — ONCE,

STEST

7ns

(8)

TIH4

Input Hold from RESET — ONCE,

STEST

2ns

(8)

NOTES:

See Table 17 on page 28 for note definitions for this table.

80960JD 数据表(PDF) 32 Page - Intel Corporation

80960JD 数据表(HTML) 32 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

数据表下载