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80960JD 数据表(PDF) 49 Page - Intel Corporation |
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80960JD 数据表(HTML) 49 Page - Intel Corporation |
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49 / 59 page ![]() 80960JD PRODUCT PREVIEW 43 Figure 30. HOLD/HOLDA Waveform For Bus Arbitration CLKIN Valid Outputs: AD31:0, ALE, ALE, ADS, A3:2, BE3:0, WIDTH/HLTD1:0, D/C, W/R, DT/R, DEN, BLAST, LOCK HOLD HOLDA (Note) NOTE: HOLD is sampled on the rising edge of CLKIN. The processor asserts HOLDA to grant the bus on the same edge in which it recognizes HOLD if the last state was Ti or the last Tr of a bus transaction. Similarly, Valid Ti or Tr Th Th Ti or Ta the processor deasserts HOLDA on the same edge in which it recognizes the deassertion of HOLD. |
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