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LTC1609ACSW 数据表(PDF) 4 Page - Linear Technology

部件名 LTC1609ACSW
功能描述  16-Bit, 200ksps, Serial ADC with Multiple Input Ranges
PDF  24 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC1609ACSW 数据表(HTML) 4 Page - Linear Technology

  LTC1609ACSW Datasheet HTML 1Page - Linear Technology LTC1609ACSW Datasheet HTML 2Page - Linear Technology LTC1609ACSW Datasheet HTML 3Page - Linear Technology LTC1609ACSW Datasheet HTML 4Page - Linear Technology LTC1609ACSW Datasheet HTML 5Page - Linear Technology LTC1609ACSW Datasheet HTML 6Page - Linear Technology LTC1609ACSW Datasheet HTML 7Page - Linear Technology LTC1609ACSW Datasheet HTML 8Page - Linear Technology LTC1609ACSW Datasheet HTML 9Page - Linear Technology Next Button
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LTC1609
1609fa
LTC1609/LTC1609A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
VDD = 5.25V
q
2.4
V
VIL
Low Level Input Voltage
VDD = 4.75V
q
0.8
V
IIN
Digital Input Current
VIN = 0V to VDD
q
±10
µA
CIN
Digital Input Capacitance
5pF
VOH
High Level Output Voltage
VDD = 4.75V
IO = –10µA
4.5
V
IO = – 200µA
q
4.0
V
VOL
Low Level Output Voltage
VDD = 4.75V
IO = 160µA
0.05
V
IO = 1.6mA
q
0.10
0.4
V
ISOURCE
Output Source Current
VOUT = 0V
–10
mA
ISINK
Output Sink Current
VOUT = VDD
10
mA
The q indicates specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)
DIGITAL I PUTS A D DIGITAL OUTPUTS
LTC1609/LTC1609A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t1
Convert Pulse Width
(Note 11)
q
40
ns
t2
R/C, CS to BUSY Delay
CL = 25pF
q
80
ns
t3
BUSY Low Time
q
3
µs
t4
BUSY Delay After End of Conversion
100
ns
t5
Aperture Delay
5ns
t6
Conversion Time
q
3
µs
t7
Acquisition Time
q
2
µs
t6 + t7
Throughput Time
q
5
µs
t8
R/C Low to DATACLK Delay
260
ns
t9
DATACLK Period
150
ns
t10
DATA Valid Setup Time
q
15
ns
t11
DATA Valid Hold Time
q
40
ns
t12
External DATACLK Period
q
50
ns
t13
External DATACLK High
q
20
ns
t14
External DATACLK Low
q
20
ns
t15
R/C, CS to External DATACLK Setup Time
q
15
t12
ns
t16
R/C to CS Setup Time
q
10
ns
t17
External DATACLK to SYNC Delay
q
650
ns
t18
External DATACLK to DATA Valid Delay
q
10
50
ns
t19
CS to External DATACLK Rising Edge Delay
q
10
ns
t20
Previous DATA Valid After CS, R/C Low
(Note 9)
q
2.2
µs
t21
BUSY to External DATACLK Setup Time
(Note 9)
q
5ns
t22
BUSY Falling Edge to Final External DATACLK
(Notes 10, 17)
q
1.2
µs
t23
TAG Valid Setup Time
q
0ns
t24
TAG Valid Hold Time
q
15
ns
The q indicates specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
TI I G CHARACTERISTICS



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