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AD9856/PCB 数据表(PDF) 5 Page - Analog Devices |
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AD9856/PCB 数据表(HTML) 5 Page - Analog Devices |
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5 / 37 page ![]() AD9856 Rev. C | Page 4 of 36 Parameter Temp Test Level Min Typ Max Unit TIMING CHARACTERISTICS Serial Control Bus Maximum Frequency Full IV 10 MHz Minimum Clock Pulse Width High (tPWH) Full IV 30 ns Minimum Clock Pulse Width Low (tPWL) Full IV 30 ns Maximum Clock Rise/Fall Time Full IV 1 ms Minimum Data Setup Time (tDS) Full IV 25 ns Minimum Data Hold Time (tDH) Full IV 0 ns Maximum Data Valid Time (tDV) Full IV 30 ns Wake-Up Time2 Full IV 1 ms Minimum RESET Pulse Width High (tRH) Full IV 5 REFCLK cycles CMOS LOGIC INPUTS Logic 1 Voltage 25°C I 2.6 V Logic 0 Voltage 25°C I 0.4 V Logic 1 Current 25°C I 12 µA Logic 0 Current 25°C I 12 µA Input Capacitance 25°C V 3 pF CMOS LOGIC OUTPUTS (1 mA LOAD) Logic 1 Voltage 25°C I 2.7 mA Logic 0 Voltage 25°C I 0.4 mA POWER SUPPLY +VS Current Full Operating Conditions3 25°C I 530 mA Burst Operation (25%) 25°C I 450 mA Single-Tone Mode 25°C I 495 mA 160 MHz Clock 25°C I 445 mA 120 MHz Clock 25°C I 345 mA Power-Down Mode 25°C I 2 mA 2 Assuming 1.3 kΩ and 0.01 µF loop filter components. 3 Assuming 1.3 kW and 0.01 mF loop filter components. |
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