ST68C554 datasheet(12/40 Pages) EXAR

12 / 40 page

ST16C554/554D/68C554

Rev. 3.10

The 68 Mode Interface

The 68 mode configures the package interface pins for

connection with Motorola, and other popular micro-

processor bus types. The interface operates similar to

the 68C454/554. In this mode the 554D decodes two

additional addresses, A3-A4 to select one of the four

UART ports. The A3-A4 address decode function is

used only when in the 68 mode (16/-68 logic 0), and is

shown in Table 3 below.

Table 3, SERIAL PORT CHANNEL SELECTION

GUIDE, 68 MODE INTERFACE

-CS

UART

CHANNEL

N/A N/A

None

Internal Registers

The 554D provides 13 internal registers for monitoring

and control. These resisters are shown in Table 4

below. Twelve registers are similar to those already

available in the standard 16C454. These registers

function as data holding registers (THR/RHR), inter-

rupt status and control registers (IER/ISR), line status

and control registers (LCR/LSR), modem status and

control registers (MCR/MSR), programmable data

rate (clock) control registers (DLL/DLM), and a user

assessable scratchpad register (SPR). Register func-

tions are more fully described in the following para-

graphs.

Table 4, INTERNAL REGISTER DECODE

READ MODE

WRITE MODE

General Register Set (THR/RHR, IER/ISR, MCR/MSR, LCR/LSR, SPR):

Receive Holding Register

Transmit Holding Register

Interrupt Enable Register

Interrupt Status Register

FIFO Control Register

Line Control Register

Modem Control Register

Line Status Register

Modem Status Register

Scratchpad Register

Baud Rate Register Set (DLL/DLM): Note *2

LSB of Divisor Latch

MSB of Divisor Latch

Note *2: These registers are accessible only when LCR bit-7 is set to a logic 1.

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