AD8363

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TCM2/PWDN

CHPF

VPOS

COMM

VREF

VTGT

VPOS

COMM

NOTES

1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.

2. THE EXPOSED PAD IS THE SYSTEM COMMON

CONNECTION AND IT MUST HAVE BOTH A GOOD

THERMAL AND GOOD ELECTRICAL CONNECTION

TO GROUND.

12

11

10

1

3

4

9

2

AD8363

TOP VIEW

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin

No.

Mnemonic

Description

Equivalent

Circuit

1

TCM2/PWDN

This is a dual function pin used for controlling the amount of nonlinear intercept temperature

compensation at voltages <2.5 V and/or for shutting down the device at voltages >4 V. If the

shutdown function is not used, this pin can be connected to the VREF pin through a voltage

divider.

See Figure 39

2

CHPF

Connect this pin to VPOS via a capacitor to determine the −3 dB point of the input signal high-

pass filter. Only add a capacitor when operating at frequencies below 10 MHz.

See Figure 48

3, 10

VPOS

Supply for the Device. Connect these pins to a 5 V power supply. Pin 3 and Pin 10 are not internally

connected; therefore, both must connect to the source.

Not

applicable

4, 9

COMM

System Common Connection. Connect these pins via low impedance to system common.

Not

applicable

5

CLPF

Connection for Loop Filter Integration (Averaging) Capacitor. Connect a ground-referenced

capacitor to this pin. A resistor can be connected in series with this capacitor to improve loop

See Figure 41

6

VOUT

Output Pin in Measurement Mode (Error Amplifier Output). In measurement mode, this pin is

connected to VSET. This pin can be used to drive a gain control when the device is used in

controller mode.

See Figure 41

7

VSET

The voltage applied to this pin sets the decibel value of the required RF input voltage that results

in zero current flow in the loop integrating capacitor pin, CLPF. This pin controls the variable gain

amplifier (VGA) gain such that a 50 mV change in VSET reduces the gain by approximately 1 dB.

See Figure 40

8

TEMP

Temperature Sensor Output.

See Figure 35

11

VREF

General-Purpose Reference Voltage Output of 2.3 V.

See Figure 36

12

VTGT

The voltage applied to this pin determines the target power at the input of the RF squaring circuit. The

intercept voltage is proportional to the voltage applied to this pin. The use of a lower target

voltage increases the crest factor capacity; however, this may affect the system loop response.

See Figure 42

13

NC

No Connect.

Not

applicable

14

INHI

This is the RF input pin for frequencies up to and including 2.6 GHz. The RF input signal is normally

ac-coupled to this pin through a coupling capacitor.

See Figure 34

15

INLO

This is the RF input pin for frequencies above 2.6 GHz. The RF input signal is normally ac-coupled

to this pin through a coupling capacitor.

See Figure 34

16

TCM1

This pin is used to adjust the intercept temperature compensation. Connect this pin to VREF

through a voltage divider or to an external dc source.

See Figure 38

EPAD

Exposed Pad. The exposed pad is the system common connection and it must have both a good

thermal and good electrical connection to ground.

Not

applicable

Rev. B | Page 8 of 29