Data Sheet

ADRF6518

Rev. A | Page 7 of 39

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 4. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VPSD

Digital Positive Supply Voltage: 3.15 V to 3.45 V.

2

COMD

Digital Common. Connect this pin to an external circuit common using the lowest possible

impedance.

3

LE

4

CLK

5

DATA

6

SDO/RST

Peak Detector Reset (RST). A >25 ns high pulse is required on this pin to reset the detector.

7

VICM/AC

Input Common-Mode Reference (VICM). VPI/2 reference output for optimal common-mode level

to drive the differential inputs. If this pin is used as a common-mode reference for the common-

mode output of the previous stage, only connect high impedance nodes to this pin.

AC Coupling/Internal Bias Activation (AC). Pull this pin low for ac coupling of the inputs.

8

VPI

Input Stage Supply Voltage: 3.15 V to 5.25 V. Connect VPI to VPS if the input common-mode range

is narrow (1.35 V to 1.95 V). Connect VPI to 5 V if a common-mode input up to 3.1 V is desired.

9, 19, 22

COM

Analog Common. Connect COM to an external circuit common using the lowest possible

impedance.

10, 11, 30, 31

INP2, INM2,

INM1, INP1

Differential Inputs, 400 Ω Differential Input Impedance.

12, 16, 25, 29

VPS

Analog Positive Supply Voltage: 3.15 V to 3.45 V.

13

VPK

Peak Detector Output. Scaling of 1 V/V peak differential at filter inputs is performed, and the

bigger peak of two channels is reported.

14, 21, 27

VGN2, VGN3,

VGN1

VGA1, VGA2, and VGA3 Analog Gain Control. 0 V to 1 V, 30 mV/dB gain scaling.

15, 26

OFS2, OFS1

Offset Correction Loop Compensation Capacitors. Connect capacitors to a circuit common.

17, 18, 23, 24

OPP2, OPM2,

OPM1, OPP1

Differential Outputs. These outputs have a <10 Ω output impedance. Common-mode range is 0.9

V to VPS − 1.2 V; default is VPS/2.

20

VOCM

Output Common-Mode Setpoint. VOCM defaults to VPS/2 if left open.

28

RAVG

Peak Detector Time-Constant Resistor. Connect this pin to VPS. Leave this pin open for the longest

hold time. The RAVG range is ∞ to 1 kΩ.

32

ENBL

Chip Enable. Pull this pin high to enable the chip.

EP

Exposed Ground Pad. Connect the exposed pad to a low impedance ground pad.

VPSD

COMD

LE

CLK

DATA

SDO/RST

VICM/AC

VPI

OPP1

OPM1

COM

VGN3

VOCM

COM

OPM2

OPP2

TOP VIEW

(Not to Scale)

ADRF6518

NOTES

1. CONNECT THE EXPOSED PADDLE TO

A LOW IMPEDANCE GROUND PAD.

24

23

22

21

20

19

18

17

1

2

3

4

5

6

7

8