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ADRF6518ACPZ-R7 数据表(PDF) 16 Page - Analog Devices |
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ADRF6518ACPZ-R7 数据表(HTML) 16 Page - Analog Devices |
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16 / 39 page ![]() ADRF6518 Data Sheet Rev. A | Page 16 of 39 BYPASS MODE VPS = 3.3 V, TA = 25°C, ZLOAD = 400 Ω, power mode bit (B9) = 1 (high power mode), digital gain code bits (B8 to B2) = 1111110, dc offset disable bit (B1) = 0 (enabled), unless otherwise noted. Figure 53. Frequency Response over Supply and Temperature Figure 54. Group Delay vs. Frequency Figure 55. Output Noise Density vs. Frequency over Analog Gains; Digital Gain = 0000001 Figure 56. Noise Figure vs. VGN1 over Digital Gain Figure 57. Output Noise Density vs. VGN1 over Digital Gain Figure 58. HD2 vs. Gain over Temperature; Fundamental at 80 MHz, Digital Gain = 0000001 50 40 30 20 10 0 –10 1M 1G 100M 10M FREQUENCY (Hz) DIGITAL GAIN = 0000001 DIGITAL GAIN = 1111110 VPS = 3.15V, 3.3V, 3.45V +85°C +25°C –40°C 0 5 10 15 20 25 30 1M 10M 100M 1G FREQUENCY (Hz) –100 –180 –170 –160 –150 –140 –130 –120 –110 50 400 350 300 250 200 150 100 FREQUENCY (MHz) VGN1, VGN2, VGN3: 0V ,0V ,0V AND 1V ,0V ,0V VGN1, VGN2, VGN3: 1V ,1V ,0V VGN1, VGN2, VGN3: 1V ,1V ,1V 45 40 35 30 25 20 15 0 1000 900 800 700 600 500 400 300 200 100 VGN1 (mV) 15dB 12dB 9dB –110 –111 –112 –113 –114 –115 –116 –117 –118 –119 –120 0 1000 900 800 700 600 500 400 300 200 100 VGN1 (mV) 15dB 12dB 9dB 0 10 20 30 40 50 60 70 0 6 12 18 24 30 36 42 48 54 60 GAIN (dB) +85°C +25°C –40°C |
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