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AD5424 数据表(PDF) 14 Page - Analog Devices

部件名 AD5424
功能描述  8-/10-/12-Bit, High Bandwidth, Multiplying DACs with Parallel Interface
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5424 数据表(HTML) 14 Page - Analog Devices

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REV. 0
–14–
AD5424/AD5433/AD5445
TERMINOLOGY
Relative Accuracy
Relative accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for 0 and full scale and is normally expressed in LSBs
or as a percentage of full-scale reading.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of –1 LSB max over
the operating temperature range ensures monotonicity.
Gain Error
Gain error or full-scale error is a measure of the output error
between an ideal DAC and the actual device output. For these
DACs, ideal maximum output is VREF – 1 LSB. Gain error of
the DACs is adjustable to 0 with external resistance.
Output Leakage Current
Output leakage current is current that flows in the DAC ladder
switches when these are turned off. For the IOUT1 terminal, it
can be measured by loading all 0s to the DAC and measuring
the IOUT1 current. Minimum current will flow in the IOUT2 line
when the DAC is loaded with all 1s.
Output Capacitance
Capacitance from IOUT1 or IOUT2 to AGND.
Output Current Settling Time
This is the amount of time it takes for the output to settle to a
specified level for a full scale input change. For these devices, it
is specified with a 100
Ω resistor to ground.
The settling time specification includes the digital delay from
CS rising edge to the full-scale output change.
Digital to Analog Glitch lmpulse
The amount of charge injected from the digital inputs to the
analog output when the inputs change state. This is normally
specified as the area of the glitch in either pA-secs or nV-secs
depending upon whether the glitch is measured as a current or
voltage signal.
Digital Feedthrough
When the device is not selected, high frequency logic activity on
the device digital inputs may be capacitively coupled through the
device to show up as noise on the IOUT pins and subsequently
into the following circuitry. This noise is digital feedthrough.
Multiplying Feedthrough Error
This is the error due to capacitive feedthrough from the DAC
reference input to the DAC IOUT1 terminal, when all 0s are
loaded to the DAC.
Total Harmonic Distortion (THD)
The DAC is driven by an ac reference. The ratio of the rms
sum of the harmonics of the DAC output to the fundamental
value is the THD. Usually only the lower order harmonics are
included, such as second to fifth.
THD
VVV
V
V
=
++
+
()
20
2
2
3
2
4
2
5
2
1
log
Digital Intermodulation Distortion
Second-order intermodulation distortion (IMD) measurements
are the relative magnitude of the fa and fb tones generated digi-
tally by the DAC and the second-order products at 2fa – fb and
2fb – fa.
Spurious-Free Dynamic Range (SFDR)
It is the usable dynamic range of a DAC before spurious noise
interferes or distorts the fundamental signal. SFDR is the mea-
sure of difference in amplitude between the fundamental and
the largest harmonically or nonharmonically related spur from
dc to full Nyquist bandwidth (half the DAC sampling rate, or
fS/2). Narrow band SFDR is a measure of SFDR over an arbi-
trary window size, in this case 50% of the fundamental. Digital
SFDR is a measure of the usable dynamic range of the DAC
when the signal is digitally generated sine wave.



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