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NM1282KSLAXAL 数据表(PDF) 41 Page - Nanya Technology Corporation. |
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NM1282KSLAXAL 数据表(HTML) 41 Page - Nanya Technology Corporation. |
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41 / 120 page  Version 1.3 41 Nanya Technology Corp. 06/2018 All Rights Reserved. © 2Gb SLC NAND + 2Gb LPDDR2 NM1282KSLAXAL NTC Proprietary Level: Property Status Read The device automatically implements the execution and verification of the Program and Erase operations. The status Read function is used to monitor the Ready/Busy status of the device, determine the result (pass/fail) of a Program or Erase operation, and determine whether the device is in Protect mode. The device status is output via the I/O port using after a “70h” command input. The Status Read can also be used during a Read operation to find out the Ready/Busy status. Status Register Definition for 70H Command I/O Page Program Block Erase Read Cache Read Cache Program Definition I/O 0 Pass / Fail Pass / Fail Invalid Invalid Pass / Fail Chip Status1 Pass : 0 / Fail : 1 I/O 1 Invalid Invalid Invalid Invalid Pass / Fail Chip Status2 Pass : 0 / Fail : 1 I/O 2 0 0 0 0 0 Not Used I/O 3 0 0 0 0 0 Not Used I/O 4 0 0 0 0 0 Not Used I/O 5 Ready / Busy Ready / Busy Ready / Busy Ready / Busy Ready / Busy Page Buffer Busy : 0 / Ready : 1 I/O 6 Ready / Busy Ready / Busy Ready / Busy Ready / Busy Ready / Busy Data Cache Busy : 0 / Ready : 1 I/O 7 Write Protect Write Protect Write Protect Write Protect Write Protect Write Prot Protected : 0 / Not Protected : 1 NOTE The Pass/Fail status on I/O0 and I/O1 is only valid during a Program/Erase operation when the device is in the Ready state. Chip Status 1: During a Auto Page Program or Auto Block Erase operation this bit indicates the pass/fail result. During a Auto Page Programming with Data Cache operation, this bit shows the pass/fail results of the current page program operation, and therefore this bit is only valid when I/O5 shows the Ready state. Chip Status 2: This bit shows the pass/fail result of the previous page program operation during Auto Page Programming with Data Cache. This status is valid when I/O6 shows the Ready State. The status output on the I/O5 is the same as that of I/O6 if the command input just before the 70h is not 15h or 31h. |
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