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GD25S512MDBJS 数据表(PDF) 4 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25S512MDBJS 数据表(HTML) 4 Page - GigaDevice Semiconductor (Beijing) Inc. |
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4 / 87 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25S512MD 4 1. FEATURES ◆ 2 x 256M-bit Serial Flash ◆ Fast Program/Erase Speed - 2 x 32M-Byte - Page Program time: 0.4ms typical - 256-Byte per programmable page - Sector Erase time: 70ms typical - Block Erase time: 0.16/0.22s typical ◆ Standard, Dual, Quad SPI - Chip Erase time: 70s typical (single die) - Standard SPI: SCLK, CS#, SI, SO, RESET# - Dual SPI: SCLK, CS#, IO0, IO1, RESET# ◆ Flexible Architecture - Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3 - Uniform Sectors of 4K-Byte - 3- or 4-Byte Addressing Mode - Uniform Blocks of 32/64K-Byte ◆ High Speed Clock Frequency ◆ Low Power Consumption - Maximum 104MHz for fast read on 3.0 - 3.6V power supply - 2uA typical deep power down current ◆ Dual I/O Data transfer up to 208Mbits/s - 24uA typical standby current ◆ Quad I/O Data transfer up to 416Mbits/s - Maximum 80MHz for fast read on 2.7 - 3.6V power supply ◆ Advanced Security Features ◆ Dual I/O Data transfer up to 160Mbits/s - 6x2048-Byte Security Registers With OTP Locks ◆ Quad I/O Data transfer up to 320Mbits/s - 128-bit Unique ID - Serial Flash Discoverable parameters (SFDP) register ◆ Software Write Protection - Write protect all/portion of memory via software ◆ Single Power Supply Voltage - Top/Bottom Block protection - Full voltage range: 2.7 - 3.6V ◆ Flexible “Concurrent Operation” ◆ Cycling Endurance and Data Retention - Independent single die access - Minimum 100,000 Program/Erase Cycles - Allows “Read while Program/Erase” - 20-year data retention typical - Allows “Multi Die Program/Erase” - Improves Program/Erase throughput ◆ Package Information - Reduces Suspend/Resume activities - SOP16 (300mil) - WSON8 (8x6mm) - TFBGA-24 (5x5 ball array) |
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