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PCF8811U/2DA/1 数据表(PDF) 36 Page - NXP Semiconductors

部件名 PCF8811U/2DA/1
功能描述  80 x 128 pixels matrix LCD driver
PDF  73 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

PCF8811U/2DA/1 数据表(HTML) 36 Page - NXP Semiconductors

Back Button PCF8811U/2DA/1 Datasheet HTML 32Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 33Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 34Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 35Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 36Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 37Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 38Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 39Page - NXP Semiconductors PCF8811U/2DA/1 Datasheet HTML 40Page - NXP Semiconductors Next Button
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2004 May 17
36
Philips Semiconductors
Product specification
80
× 128 pixels matrix LCD driver
PCF8811
13.9
Bias levels
The bias levels for an MRA driving method with p = 8 are given in Fig.31 when Gmax and F have the same value. The
value p defines the number of rows which are simultaneously selected.
The row voltage F depends on the mux rate selected (number of rows N), the threshold voltage of the liquid (VTH), the
number of simultaneously selected rows (p) and the multiplexibility (m):
(1)
The column voltages are situated around the common level VC. The column voltage levels are equidistant from each
other. In Table 19 the column voltage levels are given as a function of F.
handbook, full pagewidth
MGW752
VC
0.25Gmax
0.50Gmax
0.75Gmax
Gmax = F = VLCD
VLCD
V3_H
V2_H
V1_H
VC
V1_L
V2_L
V3_L
VSS
−Gmax = F = VSS
−0.25Gmax
−0.50Gmax
−0.75Gmax
Fig.31 Bias levels for a MRA system with p = 8 and Gmax =F.
F
1
p
-------
V
TH
N
2
----
mm
N
±
m1
--------------------------------
×
×
×
=



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