PCF8811USLASH2DASLASH1 datasheet(10/73 Pages) PHILIPS

10 / 73 page

2004 May 17

Philips Semiconductors

Product speciﬁcation

× 128 pixels matrix LCD driver

PCF8811

ADDRESSING

Data is downloaded in bytes into the RAM matrix of the

PCF8811 as indicated in Fig.2. The display RAM has

a matrix of 80 by 128 bits. The columns are addressed by

the address pointer. The address ranges are: X=0to127

(1111111), Y = 0 to 9 (1001). The Y address represents

the bank number. The X and Y address which are

effectively used can be programmed thus in order to use

the PCF8811 with different display sizes without additional

loading of the microprocessor. Addresses outside these

ranges are not allowed. The icon row when enabled is

always ROW 79 and therefore located in bank 9.

9.1

Display data RAM structure

The mode for storing data into the data RAM is dependent

on the selected command set.

9.1.1

BASIC COMMAND SET

After a write operation the column address counter

(X address) auto-increments by one, and wraps to zero

after the last column is written. The number of columns

(X address) after which the wrap around must occur can

be programmed. The Y address counter does not

auto-increment in the basic command set, the counter

stops when a complete bank has been written to. In this

case the Y address counter must be set (Y address see

Table 5) to write the next bank (see Fig.3). When only

a part of the RAM is used both X (X max) and Y (Y max)

addresses can be set.

The data order in the basic command set is as defined in

Fig.3.

handbook, full pagewidth

MGW735

Y max

X max

X address

Y address

LSB

MSB

LSB

MSB

Fig.3 Sequence of writing data bytes into the RAM (basic command set).

PCF8811U/2DA/1 数据表(PDF) 10 Page - NXP Semiconductors

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