PCF8811USLASH2DASLASH1 datasheet(57/73 Pages) PHILIPS

57 / 73 page

2004 May 17

Philips Semiconductors

Product speciﬁcation

× 128 pixels matrix LCD driver

PCF8811

22.5

Interface commands

These instructions are in addition to those indicated in Table 5.

Table 24 Additional instructions; note 1

Note

1. X = don’t care.

22.5.1

CALMM

This instruction puts the device in calibration mode. This mode enables the shift register for loading and allows

programming of the non-volatile OTP cells to take place. If the seal bit is set then this mode cannot be accessed and the

instruction will be ignored. Once in calibration mode all commands are interpreted as shift register data. The mode can

only be exited by sending data with bit D7 set to logic 0. Reset will also clear this mode. Each shift register data byte is

preceded by D/C = 0 and has only 2 significant bits, thus the remaining 6 bits are ignored. Bit D7 is the continuation bit

(D7 = 1 remain in CALMM mode, D7 = 0 exit CALMM mode). Bit D0 is the data bit and its value is shifted into the OTP

shift register (on the falling edge of SCLK).

NAME

EXT

D/CR/W

COMMAND BYTE

ACTION

CALMM

enter CALMM mode

Power control

(‘Refresh’)

PC1

PC0

switch HVgen on/off

to force a refresh of

the shift register

handbook, full pagewidth

DATA TO THE CIRCUIT FOR

CONFIGURATION AND CALIBRATION

SHIFT

FLIP-FLOP

OTP slice

OTP CELL

SHIFT

DATA

INPUT

read data

from the

OTP cell

write data

to the

OTP cell

OTP CELLs

MGU289

Fig.48 Basic OTP architecture.

PCF8811U/2DA/1 数据表(PDF) 57 Page - NXP Semiconductors

PCF8811U/2DA/1 数据表(HTML) 57 Page - NXP Semiconductors

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