数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

CS5463-ISZ 数据表(PDF) 8 Page - Cirrus Logic

部件名 CS5463-ISZ
功能描述  Single Phase, Bi-directional Power/Energy IC
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS5463-ISZ 数据表(HTML) 8 Page - Cirrus Logic

Back Button CS5463-ISZ Datasheet HTML 4Page - Cirrus Logic CS5463-ISZ Datasheet HTML 5Page - Cirrus Logic CS5463-ISZ Datasheet HTML 6Page - Cirrus Logic CS5463-ISZ Datasheet HTML 7Page - Cirrus Logic CS5463-ISZ Datasheet HTML 8Page - Cirrus Logic CS5463-ISZ Datasheet HTML 9Page - Cirrus Logic CS5463-ISZ Datasheet HTML 10Page - Cirrus Logic CS5463-ISZ Datasheet HTML 11Page - Cirrus Logic CS5463-ISZ Datasheet HTML 12Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 44 page
background image
CS5463
8
DS678PP1
ANALOG CHARACTERISTICS (Continued)
Notes: 3. Applies before system calibration.
4. All outputs unloaded. All inputs CMOS level.
5. Definition for PSRR: VREFIN tied to VREFOUT, VA+ = VD+ = 5 V, a 150 mV (zero-to-peak) (60 Hz)
sinewave is imposed onto the +5 V DC supply voltage at VA+ and VD+ pins. The “+” and “-” input pins
of both input channels are shorted to AGND. Then the CS5463 is commanded to continuous conversion
acquisition mode, and digital output data is collected for the channel under test. The (zero-to-peak)
value of the digital sinusoidal output signal is determined, and this value is converted into the
(zero-to-peak) value of the sinusoidal voltage (measured in mV) that would need to be applied at the
channel’s inputs, in order to cause the same digital sinusoidal output. This voltage is then defined as
Veq. PSRR is then (in dB):
6. When voltage level on PFMON is sagging, and LSD bit is at 0, the voltage at which LSD bit is set to 1.
7. If the LSD bit has been set to 1 (because PFMON voltage fell below PMLO), this is the voltage level on
PFMON at which the LSD bit can be permanently reset back to 0.
Parameter
Symbol
Min
Typ
Max
Unit
Analog Inputs (Voltage Channel)
Differential Input Range
[(VIN+) - (VIN-)]
VIN
-
500
-
mVP-P
Total Harmonic Distortion
THD
65
75
-
dB
Crosstalk with Current Channel at Full Scale (50, 60 Hz)
-
-70
-
dB
Input Capacitance
All Gain Ranges
IC
-
0.2
-
pF
Effective Input Impedance
EII
2
-
-
M
Noise (Referred to Input)
NV
--
140
µVrms
Offset Drift (Without the High Pass Filter)
OD
-
16.0
-
µV/°C
Gain Error
(Note 3)
GE
-
±3.0
%
Temperature Channel
Temperature Accuracy
T
-
±5
-
°C
Power Supplies
Power Supply Currents (Active State)
IA+
ID+ (VA+ = VD+ = 5 V)
ID+ (VA+ = 5 V, VD+ = 3.3 V)
PSCA
PSCD
PSCD
-
-
-
1.3
2.9
1.7
-
-
-
mA
mA
mA
Power Consumption
Active State (VA+ = VD+ = 5 V)
(Note 4)
Active State (VA+ = 5 V, VD+ = 3.3 V)
Stand-by State
Sleep State
PC
-
-
-
-
21
11.6
8
10
29
17.5
-
-
mW
mW
mW
µW
Power Supply Rejection Ratio
(50, 60 Hz)
(Note 5)
Voltage Channel
Current Channel
PSRR
45
70
-
65
75
-
-
-
dB
dB
PFMON Low-voltage Trigger Threshold
(Note 6)
PMLO
2.3
2.45
-
V
PFMON High-voltage Power-on Trip Point
(Note 7)
PMHI
-
2.55
2.7
V
PSRR
20
150
Veq
----------
log
=



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com