CS5463-ISZ datasheet(10/44 Pages) CIRRUS

10 / 44 page

CS5463

DS678PP1

Notes: 10. All measurements performed under static conditions.

11.

If a crystal is used, then XIN frequency must remain between 2.5 MHz - 5.0 MHz. If an external

oscillator is used, XIN frequency range is 2.5 MHz - 20 MHz, but K must be set so that MCLK is between

2.5 MHz - 5.0 MHz.

12. If external MCLK is used, then the duty cycle must be between 45% and 55% to maintain this

specification.

13. The frequency of CPUCLK is equal to MCLK.

14. The minimum FSCR is limited by the maximum allowed gain register value. The maximum FSCR is

limited by the full-scale signal applied to the channel input.

15. Configuration Register bits PC[6:0] are set to “0000000”.

Low-level Input Voltage (VD = 3.3 V)

All Pins Except XIN and SCLK and RESET

XIN

SCLK and RESET

VIL

0.48

0.3

0.2 VD+

High-level Output Voltage

Iout = +5 mA VOH

(VD+) - 1.0

Low-level Output Voltage

Iout = -5 mA

VOL

0.4

Input Leakage Current

Iin

-±1

±10

µA

3-state Leakage Current

IOZ

±10

µA

Digital Output Pin Capacitance

Cout

-5

Parameter

Symbol

Min

Typ

Max

Unit

CS5463-ISZ 数据表(PDF) 10 Page - Cirrus Logic

CS5463-ISZ 数据表(HTML) 10 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

数据表下载