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DS00001898A-page 29

USB3280

8.8

HS Detection Handshake – FS Downstream Facing Port

Upon entering the HS Detection process (T0) XCVRSELECT and TERMSELECT are in FS mode. The DP pull-up is

asserted and the HS terminations are disabled. The SIE then sets OPMODE to Disable Bit Stuffing and NRZI encoding,

XCVRSELECT to HS mode, and begins the transmission of all 0's data, which asserts a HS K (chirp) on the bus (T1).

The device chirp must last at least 1.0ms, and must end no later than 7.0ms after HS Reset T0. At time T1 the device

begins listening for a chirp sequence from the host port.

If the downstream facing port is not HS capable, then the HS K asserted by the device is ignored and the alternating

sequence of HS Chirp K’s and J’s is not generated. If no chirps are detected (T4) by the device, it will enter FS mode

by returning XCVRSELECT to FS mode.

Note 1:

T0 may occur to 4ms after HS Reset T0.

2:

The SIE must assert the Chirp K for 66000 CLKOUT cycles to ensure a 1ms minimum duration.

FIGURE 8-3:

HS DETECTION HANDSHAKE TIMING BEHAVIOR (FS MODE)

TABLE 8-6:

HS DETECTION HANDSHAKE TIMING VALUES (FS MODE)

Timing

Parameter

Description

Value

T0

HS Handshake begins. DP pull-up enabled, HS

terminations disabled.

0 (reference)

T1

Device enables HS Transceiver and asserts Chirp K

on the bus.

T0 < T1 < HS Reset T0 + 6.0ms

T2

Device removes Chirp K from the bus. 1ms

minimum width.

T1 + 1.0 ms < T2 <

HS Reset T0 + 7.0ms

T3

Earliest time when downstream facing port may

assert Chirp KJ sequence on the bus.

T2 < T3 < T2+100µs

T4

Chirp not detected by the device. Device reverts to

FS default state and waits for end of reset.

T2 + 1.0ms < T4 <

T2 + 2.5ms

T5

Earliest time at which host port may end reset

HS Reset T0 + 10ms