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FS32K142BHTXVLLTR 数据表(PDF) 42 Page - NXP Semiconductors

部件名 FS32K142BHTXVLLTR
功能描述  Low-power Arm Cortex-M4F/M0 core with excellent energy efficiency
PDF  100 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

FS32K142BHTXVLLTR 数据表(HTML) 42 Page - NXP Semiconductors

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6.2.5 SPLL electrical specifications
Table 34. SPLL electrical specifications
Symbol
Parameter
Min.
Typ.
Max.
Unit
S32K1xx/
S32K14xW
S32K1xx/
S32K14xW
S32K1xx
S32K14xW
FSPLL_REF1 PLL Reference Frequency Range
8
16
MHz
FSPLL_Input2 PLL Input Frequency
8
40
48
MHz
FVCO_CLK
VCO output frequency
180
320
MHz
FSPLL_CLK
PLL output frequency
90
160
MHz
JCYC_SPLL
PLL Period Jitter (RMS)3
at FVCO_CLK 180 MHz
120
ps
at FVCO_CLK 320 MHz
75
ps
JACC_SPLL
PLL accumulated jitter over 1µs (RMS)3
at FVCO_CLK 180 MHz
1350
ps
at FVCO_CLK 320 MHz
600
ps
DUNL
Lock exit frequency tolerance
± 4.47
± 5.97
%
TSPLL_LOCK Lock detector detection time4
150 × 10-6 + 1075(1/FSPLL_REF)
s
1. FSPLL_REF is PLL reference frequency range after the PREDIV. For PREDIV and MULT settings refer SCG_SPLLCFG
register of Reference Manual.
2. FSPLL_Input is PLL input frequency range before the PREDIV must be limited to the range 8 MHz to 40 MHz. This input
source could be derived from a crystal oscillator or some other external square wave clock source using OSC bypass
mode. For external clock source settings refer SCG_SOSCCFG register of Reference Manual.
3. This specification was obtained using a NXP developed PCB. PLL jitter is dependent on the noise characteristics of each
PCB and results will vary
4. Lock detector detection time is defined as the time between PLL enablement and clock availability for system use.
Memory and memory interfaces
6.3.1 Flash memory module (FTFC/FTFM) electrical specifications
This section describes the electrical characteristics of the flash memory module.
6.3.1.1 Flash timing specifications — commands
Table 35. Flash command timing specifications for S32K14x series
Symbol
Description1
S32K142
S32K144
S32K146
S32K148
Typ
Max
Typ
Max
Typ
Max
Typ
Max
Unit Notes
trd1blk
Read 1 Block
execution time
32 KB flash —
ms
64 KB flash —
0.5
0.5
0.5
Table continues on the next page...
6.3
Memory and memory interfaces
S32K1xx Data Sheet, Rev. 12, 02/2020
42
NXP Semiconductors



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