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PCF8536AT 数据表(PDF) 28 Page - NXP Semiconductors |
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PCF8536AT 数据表(HTML) 28 Page - NXP Semiconductors |
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28 / 54 page  PCA85233 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved. Product data sheet Rev. 5 — 12 November 2018 28 of 54 NXP Semiconductors PCA85233 Automotive 80 × 4 LCD driver for low multiplex rates The command bytes and control bytes are also acknowledged by all addressed PCA85233 connected to the bus. The display bytes are stored in the display RAM at the address specified by the data pointer and the subaddress counter. Both data pointer and subaddress counter are automatically updated. The acknowledgement after each byte is made only by the (A0 and A1) addressed PCA85233. After the last display byte, the I2C-bus master issues a STOP condition (P). Alternatively a START may be asserted to RESTART an I2C-bus access. 9. Internal circuitry Table 18. Control byte description Bit Symbol Value Description 7CO continue bit 0 last control byte 1 control bytes continue 6RS register selection 0 command register 1 data register 5 to 0 - not relevant Fig 20. Device protection diagram |
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