PCF8536AT datasheet(53/54 Pages) NXP

53 / 54 page

PCA85233

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Product data sheet

Rev. 5 — 12 November 2018

53 of 54

NXP Semiconductors

PCA85233

Automotive 80 × 4 LCD driver for low multiplex rates

26. Figures

Fig 1.

Rear side laser marking . . . . . . . . . . . . . . . . . . . . .2

Fig 2.

Block diagram of PCA85233 . . . . . . . . . . . . . . . . .3

Fig 3.

Pin configuration for PCA85233 . . . . . . . . . . . . . .4

Fig 4.

Display RAM bitmap . . . . . . . . . . . . . . . . . . . . . . .9

Fig 5.

Relationships between LCD layout, drive mode,

display RAM filling order, and display data

transmitted over the I2C-bus . . . . . . . . . . . . . . . .10

Fig 6.

Example of displays suitable for PCA85233 . . . .14

Fig 7.

Typical system configuration . . . . . . . . . . . . . . . .15

Fig 8.

Electro-optical characteristic: relative

transmission curve of the liquid . . . . . . . . . . . . . .17

Fig 9.

Static drive mode waveforms . . . . . . . . . . . . . . . .18

Fig 10. Waveforms for the 1:2 multiplex drive mode

with 1⁄2 bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Fig 11. Waveforms for the 1:2 multiplex drive mode

with 1⁄3 bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Fig 12. Waveforms for the 1:3 multiplex drive mode

with 1⁄3 bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Fig 13. Waveforms for the 1:4 multiplex drive mode

with 1⁄3 bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Fig 14. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

Fig 15. Definition of START and STOP conditions. . . . . .25

Fig 16. System configuration . . . . . . . . . . . . . . . . . . . . . .25

Fig 17. Acknowledgement on the I2C-bus . . . . . . . . . . . .26

Fig 18. I2C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . .27

Fig 19. Control byte format . . . . . . . . . . . . . . . . . . . . . . .27

Fig 20. Device protection diagram . . . . . . . . . . . . . . . . . .28

Fig 21. Current consumption with respect to external

clock frequency . . . . . . . . . . . . . . . . . . . . . . . . . .32

Fig 22. Frame frequency with respect to temperature . . .34

Fig 23. Driver timing waveforms . . . . . . . . . . . . . . . . . . .35

Fig 24. I2C-bus timing waveforms . . . . . . . . . . . . . . . . . .35

Fig 25. Cascaded PCA85233 configuration. . . . . . . . . . .36

Fig 26. Synchronization of the cascade for the various

PCA85233 drive modes . . . . . . . . . . . . . . . . . . . .37

Fig 27. Bare die outline of PCA85233UG . . . . . . . . . . . .39

Fig 28. Alignment marks of PCA85233 . . . . . . . . . . . . . .43

Fig 29. Tray details of PCA85233UG. . . . . . . . . . . . . . . .44

Fig 30. Die alignment in the tray . . . . . . . . . . . . . . . . . . .45

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