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TMS320F28069MPZPQ 数据表(PDF) 39 Page - Texas Instruments |
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TMS320F28069MPZPQ 数据表(HTML) 39 Page - Texas Instruments |
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39 / 181 page  C4 C3 XCLKOUT(B) XCLKIN(A) C5 C9 C10 C1 C8 C6 39 TMS320F28069, TMS320F28069F, TMS320F28069M, TMS320F28068F, TMS320F28068M TMS320F28067, TMS320F28066, TMS320F28065, TMS320F28064 TMS320F28063, TMS320F28062, TMS320F28062F www.ti.com SPRS698H – NOVEMBER 2010 – REVISED MARCH 2020 Submit Documentation Feedback Product Folder Links: TMS320F28069 TMS320F28069F TMS320F28069M TMS320F28068F TMS320F28068M TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 TMS320F28062F Specifications Copyright © 2010–2020, Texas Instruments Incorporated 5.13.2 Clock Requirements and Characteristics Table 5-8. XCLKIN Timing Requirements – PLL Enabled NO. MIN MAX UNIT C9 tf(CI) Fall time, XCLKIN 6 ns C10 tr(CI) Rise time, XCLKIN 6 ns C11 tw(CIL) Pulse duration, XCLKIN low as a percentage of tc(OSCCLK) 45% 55% C12 tw(CIH) Pulse duration, XCLKIN high as a percentage of tc(OSCCLK) 45% 55% Table 5-9. XCLKIN Timing Requirements – PLL Disabled NO. MIN MAX UNIT C9 tf(CI) Fall time, XCLKIN Up to 20 MHz 6 ns 20 MHz to 90 MHz 2 C10 tr(CI) Rise time, XCLKIN Up to 20 MHz 6 ns 20 MHz to 90 MHz 2 C11 tw(CIL) Pulse duration, XCLKIN low as a percentage of tc(OSCCLK) 45% 55% C12 tw(CIH) Pulse duration, XCLKIN high as a percentage of tc(OSCCLK) 45% 55% (1) A load of 40 pF is assumed for these parameters. (2) H = 0.5tc(XCO) The possible configuration modes are shown in Table 6-15. Table 5-10. XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)(1)(2) over recommended operating conditions (unless otherwise noted) NO. PARAMETER MIN MAX UNIT C3 tf(XCO) Fall time, XCLKOUT 5 ns C4 tr(XCO) Rise time, XCLKOUT 5 ns C5 tw(XCOL) Pulse duration, XCLKOUT low H – 2 H + 2 ns C6 tw(XCOH) Pulse duration, XCLKOUT high H – 2 H + 2 ns A. The relationship of XCLKIN to XCLKOUT depends on the divide factor chosen. The waveform relationship shown is intended to illustrate the timing parameters only and may differ based on actual configuration. B. XCLKOUT configured to reflect SYSCLKOUT. Figure 5-9. Clock Timing |
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