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TMS320F28069MPZPQ 数据表(PDF) 49 Page - Texas Instruments |
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TMS320F28069MPZPQ 数据表(HTML) 49 Page - Texas Instruments |
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49 / 181 page ![]() 49 TMS320F28069, TMS320F28069F, TMS320F28069M, TMS320F28068F, TMS320F28068M TMS320F28067, TMS320F28066, TMS320F28065, TMS320F28064 TMS320F28063, TMS320F28062, TMS320F28062F www.ti.com SPRS698H – NOVEMBER 2010 – REVISED MARCH 2020 Submit Documentation Feedback Product Folder Links: TMS320F28069 TMS320F28069F TMS320F28069M TMS320F28068F TMS320F28068M TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 TMS320F28062F Detailed Description Copyright © 2010–2020, Texas Instruments Incorporated 6.1.18 Peripheral Frames 0, 1, 2, 3 (PFn) The device segregates peripherals into four sections. The mapping of peripherals is as follows: PF0: PIE: PIE Interrupt Enable and Control Registers Plus PIE Vector Table Flash: Flash Waitstate Registers Timers: CPU-Timers 0, 1, 2 Registers CSM: Code Security Module KEY Registers ADC: ADC Result Registers CLA: Control Law Accelrator Registers and Message RAMs PF1: GPIO: GPIO MUX Configuration and Control Registers eCAN: Enhanced Control Area Network Configuration and Control Registers PF2: SYS: System Control Registers SCI: Serial Communications Interface (SCI) Control and RX/TX Registers SPI: Serial Port Interface (SPI) Control and RX/TX Registers ADC: ADC Status, Control, and Configuration Registers I2C: Inter-Integrated Circuit Module and Registers XINT: External Interrupt Registers PF3: McBSP: Multichannel Buffered Serial Port Registers ePWM: Enhanced Pulse Width Modulator Module and Registers eCAP: Enhanced Capture Module and Registers eQEP: Enhanced Quadrature Encoder Pulse Module and Registers Comparators: Comparator Modules USB: Universal Serial Bus Module and Registers 6.1.19 General-Purpose Input/Output (GPIO) Multiplexer Most of the peripheral signals are multiplexed with general-purpose input/output (GPIO) signals. This enables the user to use a pin as GPIO if the peripheral signal or function is not used. On reset, GPIO pins are configured as inputs. The user can individually program each pin for GPIO mode or peripheral signal mode. For specific inputs, the user can also select the number of input qualification cycles. This is to filter unwanted noise glitches. The GPIO signals can also be used to bring the device out of specific low-power modes. |
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