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ES9028PRO 数据表(PDF) 5 Page - ESS Technology,Inc |
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ES9028PRO 数据表(HTML) 5 Page - ESS Technology,Inc |
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5 / 57 page  July 6, 2020 CONFIDENTIAL INFORMATION v3.6 ES9028PRO 32-Bit HyperStream® II 8-Channel Audio DAC 5 ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA. Tel (408) 643- 8800 • Fax (408) 643-8801 PIN DESCRIPTIONS (continued) Pin Name Pin Type Reset State Pin Description 40 GPIO1 I/O Tri-stated GPIO 1 41 ADDR I Tri-stated Chip Address Select 42 AVCC_R Power Power Low-Noise Analog Power (+3.3V) for Right channels 43 AGND_R Ground Ground Analog Ground for Right channels 44 DAC4 AO Driven to ground via RDAC Differential Positive Analog Output 4 45 DAC4B AO Driven to ground via RDAC Differential Negative Analog Output 4 46 DAC2B AO Driven to ground via RDAC Differential Negative Analog Output 2 47 DAC2 AO Driven to ground via RDAC Differential Positive Analog Output 2 48 VDD_R Power Power Analog Power (+1.2V) for Right channels 49 AVCC_R Power Power Low-Noise Analog Power (+3.3V) for Right channels 50 AGND_R Ground Ground Analog Ground for Right channels 51 DGND Ground Ground Digital Ground 52 DATA8 I/O Tri-stated DSD Data8 or SPDIF Input 9 53 DATA7 I/O Tri-stated DSD Data7 or SPDIF Input 8 54 DATA6 I/O Tri-stated DSD Data6 or SPDIF Input 7 55 DATA5 I/O Tri-stated DSD Data5 or PCM Data CH7 / CH8 or SPDIF Input 6 56 DATA4 I/O Tri-stated DSD Data4 or PCM Data CH5 / CH6 or SPDIF Input 5 57 DATA3 I/O Tri-stated DSD Data3 or PCM Data CH3 / CH4 or SPDIF Input 4 58 DATA2 I/O Tri-stated DSD Data2 or PCM Data CH1 / CH2 or SPDIF Input 3 59 DATA1 I/O Tri-stated DSD Data1 or PCM Frame Clock or SPDIF Input 2 60 DATA_CLK I/O Tri-stated PCM Bit Clock or DSD Bit Clock or SPDIF Input 1 61 DVDD Power Power Digital Power (+1.2V) for core of chip 62 AVDD Power Power Digital Power (+1.8V / +3.3V) for top pad ring of chip 63 AGND_L Ground Ground Analog Ground for Left channels 64 AVCC_L Power Power Low-Noise Analog Power (+3.3V) for Left channels Exposed Pad Can be left open, connected to digital or analog ground. Internally connected to substrate via a conductive epoxy Notes: VDD_L, VDD_R and DVDD are internally connected. I = Digital Input I/O = Input / Output AI = Analog Input AO = Analog Output All unused digital inputs should be connected to ground directly, or via a pull-down resistor of 4.7k Ω to 47kΩ 5V Tolerant Pins (3.3V AVDD Supply Only) The following pins are 5V tolerant: • RESETB • SDA and SCL • GPIO1-4 • ADDR • DATA1-8 • DATA_CLK |
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