ES9028PRO datasheet(7/57 Pages) ESS

7 / 57 page

July 6, 2020

CONFIDENTIAL INFORMATION v3.6

ES9028PRO 32-Bit HyperStream® II 8-Channel Audio DAC

ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA. Tel (408) 643-

8800 • Fax (408) 643-8801

Master Mode

The DAC can become an audio timing master via master_mode in Register 10: Master Mode and Sync Configuration.

The ‘input_select’ bits in Register 1: Input selection must be set correctly to select either DSD or serial master mode.

The Bit Clock frequency can be configured using one of the following two methods:

Set the desired master_div in Register 10: Master Mode and Sync Configuration, or

Use NCO mode to set FSR using Register 42-45: Programmable NCO. When in NCO mode the master_div setting will

be ignored.

An available GPIO pin can be configured to output MCLK using Register 8: GPIO1-2 Configuration and Register 9: GPIO3-4

Configuration.

DATA_CLK

DATA1

DATA5~2

SD[3:0] (Serial PCM Data)

DATA_CLK

DATA1

DATA5~2

GPIOx

MCLK (Master Clock)

SLAVE PCM MODE

MASTER PCM MODE

BCLK (Bit Clock)

LRCK (Frame Clock)

BCLK (Bit Clock)

LRCK (Frame Clock)

SD[3:0] (Serial PCM Data)

DATA_CLK

DATA8~1

DATA_CLK

DATA8~1

GPIOx

MCLK (Master Clock)

SLAVE DSD MODE

MASTER DSD MODE

DSD DATA_CLK

DSD DATA[7:0]

DSD DATA_CLK

DSD DATA[7:0]

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