EM78P152S datasheet(12/52 Pages) ETC1

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EM78P152/3S

8-Bit Microcontroller with OTP ROM

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Product Specification (V1.8) 09.08.2009

(This specification is subject to change without further notice)

5.1.5 R4 (RAM Select Register)

Bits 7 ~ 6 are general-purpose read/write bits.

See the Data Memory Configuration in Figure 5-3.

5.1.6 R5 ~ R6 (Port 5 ~ Port 6)

R5 and R6 are I/O registers.

Only the lower 4 bits of R5 are available.

The upper 4 bits of R5 are fixed to 0.

P63 is input only.

5.1.7 RF (Interrupt Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

EXIF

ICIF

TCIF

Note: “ 1 ” means with interrupt request

“ 0 ” means no interrupt occurs

Bits 7 ~ 3:

Not used.

Bit 2 (EXIF): External Interrupt Flag. Set by a falling edge on /INT pin, reset by

software.

Bit 1 (ICIF): Port 6 input status changed interrupt flag. Set when Port 6 input changes,

reset by software.

Bit 0 (TCIF): TCC Overflow Interrupt Flag. Set when TCC overflows, reset by

software.

RF can be cleared by instruction but cannot be set.

IOCF is the interrupt mask register.

NOTE

The result of reading RF is the "logic AND" of RF and IOCF.

5.1.8 R10 ~ R2F

These are all 8-bit general-purpose registers.

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