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EM78P152S 数据表(PDF) 14 Page - List of Unclassifed Manufacturers |
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EM78P152S 数据表(HTML) 14 Page - List of Unclassifed Manufacturers |
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14 / 52 page ![]() EM78P152/3S 8-Bit Microcontroller with OTP ROM 10 • Product Specification (V1.8) 09.08.2009 (This specification is subject to change without further notice) 5.2.3 IOC5 ~ IOC6 (I/O Port Control Register) 0 : defines the relative I/O pin as output 1 : puts the relative I/O pin into high impedance Only the lower 4 bits of IOC5 are available to be defined. IOC5 and IOC6 registers are both readable and writable. 5.2.4 IOCB (Pull-down Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - /PD6 /PD5 /PD4 - /PD2 /PD1 /PD0 Bit 7: Not used 0 : Enable internal pull-down 1 : Disable internal pull-down Bit 6 (/PD6): Control bit used to enable pull-down of the P62 pin. Bit 5 (/PD5): Control bit used to enable pull-down of the P61 pin. Bit 4 (/PD4): Control bit used to enable pull-down of the P60 pin. Bit 3: Not used Bit 2 (/PD2): Control bit used to enable pull-down of the P52 pin. Bit 1 (/PD1): Control bit used to enable pull-down of the P51 pin. Bit 0 (/PD0): Control bit used to enable pull-down of the P50 pin. The IOCB Register is both readable and writable. 5.2.5 IOCC (Open-drain Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 OD7 OD6 OD5 OD4 - OD2 OD1 OD0 Bit 7 (OD7): Control bit used to enable open-drain of the P67 pin. 0 : Disable open-drain output 1 : Enable open-drain output Bit 6 (OD6): Control bit used to enable open-drain of the P66 pin. Bit 5 (OD5): Control bit used to enable open-drain of the P65 pin. Bit 4 (OD4): Control bit used to enable open-drain of the P64 pin. Bits 3: Not used Bit 2 (OD2): Control bit used to enable open-drain of the P62 pin. Bit 1 (OD1): Control bit used to enable open-drain of the P61 pin. Bit 0 (OD0): Control bit used to enable open-drain of the P60 pin. The IOCC Register is both readable and writable. |
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