EM78P152S datasheet(13/52 Pages) ETC1

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EM78P152/3S

8-Bit Microcontroller with OTP ROM

Product Specification (V1.8) 09.08.2009

• 9

(This specification is subject to change without further notice)

5.2 Special Function Registers

5.2.1 A (Accumulator)

Internal data transfer operation, or instruction operand holding usually involves the

temporary storage function of the Accumulator, which is not an addressable register.

5.2.2 CONT (Control Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

/INT

PAB

PSR2

PSR1

PSR0

Bit 7:

Not used

Bit 6 (/INT): Interrupt enable flag

0 : masked by DISI or hardware interrupt

1 : enabled by ENI/RETI instructions

Bit 5 (TS): TCC signal source

0 : internal instruction cycle clock, P62 is a bidirectional I/O pin

1 : transition on TCC pin

Bit 4 (TE): TCC Signal Edge

0 : increment if the transition from low to high takes place on TCC pin

1 : increment if the transition from high to low takes place on TCC pin

Bit 3 (PAB): Prescaler Assigned Bit

0 : TCC

1 : WDT

Bit 2 ~ Bit 0 (PSR2 ~ PSR0) TCC/WDT prescaler bits

PSR2

PSR1

PSR0

TCC Rate

WDT Rate

1:2

1:1

1:4

1:2

1:8

1:4

1:16

1:8

1:32

1:16

1:64

1:32

1:128

1:64

1:256

1:128

The CONT register is both readable and writable.

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