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EM78P152S 数据表(PDF) 17 Page - List of Unclassifed Manufacturers |
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EM78P152S 数据表(HTML) 17 Page - List of Unclassifed Manufacturers |
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17 / 52 page ![]() EM78P152/3S 8-Bit Microcontroller with OTP ROM 5.4 I/O Ports The I/O registers, both Port 5 and Port 6, are bidirectional tri-state I/O ports. Port 6 can be pulled-high internally by software except P63. In addition, Port 6 can also have open-drain output by software except P63. Input status changed interrupt (or wake-up) function is available from Port 6. P50 ~ P52 and P60 ~ P62 pins can be pulled-down by software. Each I/O pin can be defined as "input" or "output" pin by the I/O control register (IOC5 ~ IOC6) except P63. The I/O registers and I/O control registers are both readable and writable. The I/O interface circuits for Port 5 and Port 6 are shown in Figure 5-5, Figure 5-6 and Figure 5-7 respectively. Data Bus TCC Pin CLK (Fosc/2 or Fosc/4) 0 1 M U X M U X 1 0 SYNC 2 cycles TCC (R1) TE TS PAB TCC Overflow Interrupt PAB PAB 0 1 M U X WDT WDTE (in IOCE) MUX WDT Time Out 8-bit Counter 8-to-1 MUX PSR0~PSR2 01 Figure 5-4 TCC and WDT Block Diagram Product Specification (V1.8) 09.08.2009 • 13 (This specification is subject to change without further notice) |
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