数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

WM8774IFT 数据表(PDF) 25 Page - Wolfson Microelectronics plc

部件名 WM8774IFT
功能描述  24 - bit, 192kHz 8 - Channel Input Stereo Codec
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8774IFT 数据表(HTML) 25 Page - Wolfson Microelectronics plc

Back Button WM8774IFT Datasheet HTML 21Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 22Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 23Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 24Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 25Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 26Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 27Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 28Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 29Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 25 / 42 page
background image
Product Preview
WM8774
PP Rev 1.0 June 2002
25
BIT
LABEL
DEFAULT
DESCRIPTION
10011
Timeout Clock Disable
3
TOD
0
DAC Analogue Zero cross detect
timeout disable
0 : Timeout enabled
1: Timeout disabled
DAC ANALOGUE OUTPUT ATTENUATION
Register bits LA and RA control the left and right channel attenuation of DAC. Register bits MASTA
can be used to control attenuation of both channels.
Table 8 shows how the attenuation levels are selected from the 7-bit words.
L/RA[6:0]
ATTENUATION LEVEL
00(hex)
-
∞dB (mute)
:
:
1A(hex)
-
∞dB (mute)
1B(hex)
-100dB
:
:
7D(hex)
-2dB
7E(hex)
-1dB
7F(hex)
0dB
Table 10 Analogue Volume Control Attenuation Levels
DAC DIGITAL VOLUME CONTROL
The DAC volume may also be adjusted in the digital domain using independent digital attenuation
control registers
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
7:0
LDA[7:0]
11111111
(0dB)
Digital Attenuation data for Left channel DACL in 0.5dB steps. See
Table 11
01001
Digital
Attenuation
DACL
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store LDA in intermediate latch (no change to output)
1: Store LDA and update attenuation on all channels
7:0
RDA[6:0]
11111111
(0dB)
Digital Attenuation data for Right channel DACR in 0.5dB steps. See
Table 11
01010
Digital
Attenuation
DACR
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store RDA in intermediate latch (no change to output)
1: Store RDA and update attenuation on all channels.
7:0
ASTDA[7:0]
11111111
(0dB)
Digital Attenuation data for both DAC channels in 0.5dB steps. See
Table 11
10001
Master
Digital
Attenuation
(both channels)
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com