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ADP5075ACBZ-R7 数据表(PDF) 12 Page - Analog Devices |
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ADP5075ACBZ-R7 数据表(HTML) 12 Page - Analog Devices |
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12 / 19 page ![]() ADP5075 Data Sheet Rev. B | Page 12 of 19 SOFT START The regulator in the ADP5075 includes soft start circuitry that ramps the output voltage in a controlled manner during startup, thereby limiting the inrush current. The soft start time is internally set to the fastest rate when the SS pin is open. Connecting a resistor between SS and ground allows the adjustment of the soft start delay. SLEW RATE CONTROL The ADP5075 uses programmable output driver slew rate control circuitry. This circuitry reduces the slew rate of the switching node as shown in Figure 24, resulting in reduced ringing and lower EMI. To program the slew rate, connect the SLEW pin to the VREG pin for normal mode, to the GND pin for slow mode, or leave it open for fast mode. This configuration allows the use of an open-drain output from a noise sensitive device to switch the slew rate from fast to slow, for example, during ADC sampling. Note that slew rate control causes a trade-off between efficiency and low EMI. FASTEST SLOWEST Figure 24. Switching Node at Various Slew Rate Settings CURRENT-LIMIT PROTECTION The inverting regulator in the ADP5075 includes current-limit protection circuitry to limit the amount of forward current through the MOSFET switch. When the peak inductor current exceeds the overcurrent limit threshold for a number of clock cycles during an overload or short-circuit condition, the regulator enters hiccup mode. The regulator stops switching and then restarts with a new soft start cycle after tHICCUP and repeats until the overcurrent condition is removed. OVERVOLTAGE PROTECTION An overvoltage protection mechanism is present on the FB pin for the inverting regulator. When the voltage on the FB pin drops below the VOV threshold, the switching stops until the voltage rises above the threshold. This functionality is enabled after the soft start period has elapsed. THERMAL SHUTDOWN In the event that the ADP5075 junction temperature rises above TSHDN, the thermal shutdown circuit turns off the IC. Extreme junction temperatures can be the result of prolonged high current operation, poor circuit board design, and/or high ambient temperature. Hysteresis is included so that when thermal shutdown occurs, the ADP5075 does not return to operation until the on- chip temperature drops below TSHDN minus THYS. When resuming from thermal shutdown, a soft start is performed. |
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