ADP5075

Data Sheet

Rev. B | Page 14 of 19

VREG Capacitor

VREG pin and GND.

VREF Capacitor

VREF pin and GND.

Soft Start Resistor

A resistor can be connected between the SS pin and the GND pin

to increase the soft start time. The soft start time can be set

using this resistor between 4 ms (268 kΩ) and 32 ms (50 kΩ).

Leaving the SS pin open selects the fastest time of 4 ms. Figure 25

shows the behavior of this operation. Calculate the soft start time

using the following formula:

SS PIN OPEN

SOFT START

TIMER

SOFT START

RESISTOR

R1

R2

32ms

4ms

Figure 25. Soft Start Behavior

Diodes

A Schottky diode with low junction capacitance is recommended

for D1. At higher output voltages and especially at higher switching

frequencies, the junction capacitance is a significant contributor to

efficiency. Higher capacitance diodes also generate more switching

noise. As a guide, a diode with less than 40 pF junction capacitance

is preferred when the output voltage is greater than −5 V.

Inductor Selection

The inductor stores energy during the on time of the power

switch, and transfers that energy to the output through the

output rectifier during the off time. To balance the tradeoffs

between small inductor current ripple and efficiency, inductance

values in the range of 1 µH to 22 µH are recommended. In

general, lower inductance values have higher saturation current

and lower series resistance for a given physical size. However,

lower inductance results in a higher peak current that can lead

to reduced efficiency and greater input and/or output ripple and

noise. A peak-to-peak inductor ripple current close to 30% of

the maximum dc current in the inductor typically yields an

optimal compromise.

For the smallest solution size, inductors with a saturation

application is such that the inductor current stays below the

saturated region.

For the inductor ripple current in continuous conduction mode

determine the switch duty cycle (Duty) by the following equation:

















+

+

+

=

DIODE

NEG

IN

DIODE

NEG

V

V

V

V

V

Duty

|

|

|

|

(D1).

using the following equation:

)

1

(

Duty

I

I

OUT

L1

−

=

SW

ON

f

Duty

t =

L1

t

V

I

ON

IN

L1

×

=

∆

Solve for the inductance value (L1) using the following equation:

L1

ON

IN

I

t

V

L1

∆

×

=

Assuming an inductor ripple current of 30% of the maximum

dc current in the inductor results in

OUT

ON

IN

I

Duty

t

V

L1

×

−

×

×

=

3

.

0

)

1

(

Ensure that the peak inductor current (the maximum input

current plus half the inductor ripple current) is below the rated

saturation current of the inductor. Likewise, ensure that the

maximum rated rms current of the inductor is greater than the

maximum dc input current to the regulator.

When the ADP5075 inverting regulator is operated in CCM at

duty cycles greater than 50%, slope compensation is required to

stabilize the current mode loop. For stable current mode operation,

ensure that the selected inductance is equal to or greater than

parameters in the following equation:

















−

−

×

=

>

33

.

0

)

1

(

27

.

0

Duty

V

L

L1

IN

MIN

(µH)

Table 9 suggests a series of inductors to use with the ADP5075

inverting regulator.