Data Sheet

ADP5075

Rev. B | Page 13 of 19

APPLICATIONS INFORMATION

ADIsimPOWER DESIGN TOOL

The ADP5075 is supported by the ADIsimPower™ design tool

set. ADIsimPower is a collection of tools that produce complete

power designs optimized to a specific design goal. These tools

allow the user to generate a full schematic, bill of materials, and

calculate performance in minutes. ADIsimPower can optimize

designs for cost, area, efficiency, and device count while taking

into consideration the operating conditions and limitations of

the IC and all real external components. The ADIsimPower tool

can be found at www.analog.com/adisimpower, and the user

can request an unpopulated board through the tool.

COMPONENT SELECTION

Feedback Resistors

The ADP5075 provides an adjustable output voltage. An external

resistor divider sets the output voltage, where the divider output

voltage accuracy degradation due to feedback bias current, ensure

Set the negative output for the inverting regulator by

(

)

FB

REF

FB

FT

FB

NEG

V

V

R

R

V

V

−

−

=

where:

Table 7 shows recommended values for common output

voltages using standard resistor values.

Table 7. Recommended Feedback Resistor Values

Desired Output

Voltage (V)

Actual Output

Voltage (V)

−1.8

0.332

102

−1.804

−3

0.475

100

−3.000

−3.3

0.523

102

−3.302

−4.2

0.715

115

−4.174

−5

1.15

158

−5.023

−9

1.62

133

−8.944

−12

1.15

71.5

−12.067

−13

2.8

162

−13.027

−15

2.32

118

−14.929

−18

2.67

113

−18.103

−20

2.94

113

−20.014

−24

3.16

102

−23.984

−30

4.12

107

−30.004

−35

5.11

115

−34.748

Output Capacitor

Higher output capacitor values reduce the output voltage ripple

and improve load transient response. When choosing this value,

it is also important to account for the loss of capacitance due to

the output voltage dc bias.

Ceramic capacitors are manufactured with a variety of dielectrics,

each with a different behavior over temperature and applied

voltage. Capacitors must have a dielectric adequate to ensure

the minimum capacitance over the necessary temperature range

and dc bias conditions. X5R or X7R dielectrics with a voltage rating

of 25 V or 50 V (depending on output) are recommended for

best performance. Y5V and Z5U dielectrics are not recommended

for use with any dc-to-dc converter because of their poor

temperature and dc bias characteristics.

Calculate the worst case capacitance accounting for capacitor

variation over temperature, component tolerance, and voltage

using the following equation:

(1 − Tolerance)

where:

TEMPCO is the worst case capacitor temperature coefficient.

DCBIASCO is the dc bias derating at the output voltage.

Tolerance is the worst case component tolerance.

To guarantee the performance of the device, it is imperative that

the effects of dc bias, temperature, and tolerances on the behavior

of the capacitors be evaluated for each application.

Capacitors with lower effective series resistance (ESR) and

effective series inductance (ESL) are preferred to minimize

output voltage ripple.

Note that the use of large output capacitors may require a

slower soft start to prevent current limit during startup. A 10 µF

capacitor is suggested as a good balance between performance

and size.

Input Capacitor

Higher value input capacitors help reduce the input voltage

ripple and improve transient response.

To minimize supply noise, place the input capacitor as close as

possible to the AVIN and PVIN pins. A low ESR capacitor is

recommended.

The effective capacitance needed for stability is a minimum

of 10 µF. If the power pins are individually decoupled, it is

recommended to use an effective minimum of a 5.6 µF capacitor

on the PVIN pin and a 3.3 µF capacitor on the AVIN pin. The

minimum values specified exclude dc bias, temperature, and

tolerance effects that are application dependent and must be taken

into consideration.