ST25DV64K datasheet(157/200 Pages) STMICROELECTRONICS

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Appendix A Bit representation and coding for fast commands

Data bits are encoded using Manchester coding, according to the following schemes. For the low data rate, same

subcarrier frequency or frequencies is/are used. In this case, the number of pulses is multiplied by 4 and all times

increase by this factor. For the Fast commands using one subcarrier, all pulse numbers and times are divided by

A.1

Bit coding using one subcarrier

A.1.1

High data rate

For the fast commands, a logic 0 starts with four pulses at 423.75 kHz (fC/32) followed by an unmodulated time of

9.44 µs, as shown in Figure 86.

Figure 86. Logic 0, high data rate, fast commands

18.88 µs

For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by four pulses of 423.75

kHz (fC/32), as shown in Figure 87.

Figure 87. Logic 1, high data rate, fast commands

18.88 µs

A.1.2

Low data rate

For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of

37.76 µs, as shown in Figure 88.

Figure 88. Logic 0, low data rate, fast commands

75.52 µs

For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 µs followed by 16 pulses at 423.75

kHz (fC/32), as shown in Figure 89.

ST25DV04K ST25DV16K ST25DV64K

Bit representation and coding for fast commands

DS10925 - Rev 9

page 157/200

ST25DV64K 数据表(PDF) 157 Page - STMicroelectronics