数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD9959/PCBZ 数据表(PDF) 7 Page - Analog Devices

部件名 AD9959/PCBZ
功能描述  4-Channel, 500 MSPS DDS with 10-Bit DACs
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9959/PCBZ 数据表(HTML) 7 Page - Analog Devices

Back Button AD9959/PCBZ Datasheet HTML 3Page - Analog Devices AD9959/PCBZ Datasheet HTML 4Page - Analog Devices AD9959/PCBZ Datasheet HTML 5Page - Analog Devices AD9959/PCBZ Datasheet HTML 6Page - Analog Devices AD9959/PCBZ Datasheet HTML 7Page - Analog Devices AD9959/PCBZ Datasheet HTML 8Page - Analog Devices AD9959/PCBZ Datasheet HTML 9Page - Analog Devices AD9959/PCBZ Datasheet HTML 10Page - Analog Devices AD9959/PCBZ Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 44 page
background image
Data Sheet
AD9959
Rev. C | Page 7 of 44
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
CMOS LOGIC OUTPUTS
1 mA load
VOH
2.7
V
VOL
0.4
V
POWER SUPPLY
Total Power Dissipation—All Channels On,
Single-Tone Mode
540
635
mW
Dominated by supply variation
Total Power Dissipation—All Channels On,
with Sweep Accumulator
580
680
mW
Dominated by supply variation
Total Power Dissipation—Full Power-Down
13
mW
IAVDD—All Channels On, Single-Tone Mode
155
180
mA
IAVDD—All Channels On, Sweep Accumulator, REFCLK
Multiplier and 10-Bit Output Scalar Enabled
160
185
mA
IDVDD—All Channels On, Single-Tone Mode
105
125
mA
IDVDD—All Channels On, Sweep Accumulator, REFCLK
Multiplier and 10-Bit Output Scalar Enabled
125
145
mA
IDVDD_I/O
40
mA
IDVDD = read
30
mA
IDVDD = write
IAVDD Power-Down Mode
0.7
mA
IDVDD Power-Down Mode
1.1
mA
DATA LATENCY (PIPELINE DELAY) SINGLE-TONE MODE2, 3
Frequency, Phase, and Amplitude Words to DAC
Output with Matched Latency Enabled
29
SYSCLK
s
Frequency Word to DAC Output with Matched
Latency Disabled
29
SYSCLK
s
Phase Offset Word to DAC Output with Matched
Latency Disabled
25
SYSCLK
s
Amplitude Word to DAC Output with Matched
Latency Disabled
17
SYSCLK
s
DATA LATENCY (PIPELINE DELAY) MODULATION MODE3, 4
Frequency Word to DAC Output
34
SYSCLK
s
Phase Offset Word to DAC Output
29
SYSCLK
s
Amplitude Word to DAC Output
21
SYSCLK
s
DATA LATENCY (PIPELINE DELAY) LINEAR SWEEP MODE3,4
Frequency Rising/Falling Delta Tuning Word to DAC
Output
41
SYSCLK
s
Phase Offset Rising/Falling Delta Tuning Word to
DAC Output
37
SYSCLK
s
Amplitude Rising/Falling Delta Tuning Word to DAC
Output
29
SYSCLK
s
1
For the VCO frequency range of 160 MHz to 255 MHz, there is no guarantee of operation.
2
Data latency is referenced to I/O_UPDATE.
3
Data latency is fixed.
4
Data latency is referenced to a profile change.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com