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CC2430-RTR1-F64Z 数据表(PDF) 57 Page - Texas Instruments |
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CC2430-RTR1-F64Z 数据表(HTML) 57 Page - Texas Instruments |
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57 / 234 page  CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 57 of 232 TCON (0x88) – Interrupt Flags Bit Name Reset R/W Description URX1IF – USART1 RX interrupt flag. Set to 1 when USART1 RX interrupt occurs and cleared when CPU vectors to the interrupt service routine. 0 Interrupt not pending 7 URX1IF 0 R/W H0 1 Interrupt pending 6 - 0 R/W Not used ADCIF – ADC interrupt flag. Set to 1 when ADC interrupt occurs and cleared when CPU vectors to the interrupt service routine. 0 Interrupt not pending 5 ADCIF 0 R/W H0 1 Interrupt pending 4 - 0 R/W Not used URX0IF – USART0 RX interrupt flag. Set to 1 when USART0 interrupt occurs and cleared when CPU vectors to the interrupt service routine. 0 Interrupt not pending 3 URX0IF 0 R/W H0 1 Interrupt pending 2 IT1 1 R/W Reserved. Must always be set to 1. RFERR – RF TX/RX FIFO interrupt flag. Set to 1 when RFERR interrupt occurs and cleared when CPU vectors to the interrupt service routine. 0 Interrupt not pending 1 RFERRIF 0 R/W H0 1 Interrupt pending 0 IT0 1 R/W Reserved. Must always be set to 1. |
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