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CC2430-RTR1-F64Z 数据表(PDF) 68 Page - Texas Instruments |
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CC2430-RTR1-F64Z 数据表(HTML) 68 Page - Texas Instruments |
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68 / 234 page  CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 68 of 232 MEMCTR (0xC7) – Memory Arbiter Control CC2430-F32/64 Bit Name Reset R/W Description 7 - 0 R0 Not used Unified memory mapping. When unified mapping is enabled, all physical memories are mapped into the CODE memory space as far as possible, when uniform mapping is disabled only flash memory is mapped to CODE space 0 Disable unified mapping 6 MUNIF 0 R/W 1 Enable unified mapping 5:2 - 0000 R/W Reserved. Always set to 0000. 3 Flash cache disable. Invalidates contents of instruction cache and forces all instruction read accesses to read straight from flash memory. Disabling will increase power consumption and is provided for debug purposes. 0 Cache enabled 1 CACHDIS 0 R/W 1 Cache disabled 0 - 1 R/W Reserved. Always set to 1. 3 3 Reserved bits must always be set to the specified value. Failure to follow this will result in indeterminate behaviour. |
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