CC2430-RTR1-F64Z datasheet(152/234 Pages) TI

152 / 234 page

CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 152 of 232

U0UCR (0xC4) – USART 0 UART Control

Bit

Name

Reset

R/W

Description

FLUSH

R0/W1

Flush unit. When set, this event will immediately stop the current

operation and return the unit to idle state.

UART hardware flow enable. Selects use of hardware flow control

with RTS and CTS pins

Flow control disabled

FLOW

R/W

Flow control enabled

UART data bit 9 contents. This value is used when 9 bit transfer is

enabled. When parity is disabled, the value written to

D9 is

transmitted as the bit 9 when 9 bit data is enabled.

If parity is enabled then this bit sets the parity level as follows.

0Odd parity

R/W

Even parity

UART 9-bit data enable. When this bit is 1, data is 9 bits and the

content of data bit 9 is given by

D9 and PARITY.

8 bits transfer

BIT9

R/W

9 bits transfer

UART parity enable.

Parity disabled

PARITY

R/W

Parity enabled

UART number of stop bits. Selects the number of stop bits to

transmit

1 stop bit

SPB

R/W

2 stop bits

UART stop bit level

Low stop bit

STOP

R/W

High stop bit

UART start bit level. The polarity of the idle line is assumed the

opposite of the selected start bit level.

Low start bit

START

R/W

High start bit

CC2430-RTR1-F64Z 数据表(PDF) 152 Page - Texas Instruments

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