数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

KSZ9563RNXI-TR 数据表(PDF) 33 Page - Microchip Technology

部件名 KSZ9563RNXI-TR
功能描述  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9563RNXI-TR 数据表(HTML) 33 Page - Microchip Technology

Back Button KSZ9563RNXI-TR Datasheet HTML 29Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 30Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 31Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 32Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 33Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 34Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 35Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 36Page - Microchip Technology KSZ9563RNXI-TR Datasheet HTML 37Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 33 / 226 page
background image
 2017-2018 Microchip Technology Inc.
DS00002419D-page 33
KSZ9563R
4.4.3.2.1
Tag Insertion and Removal
Tag insertion is enabled on all ports when the VLAN feature is enabled. At the ingress port, untagged packets are tagged
with the ingress port's default tag. The default tag is separately programmable for each port. The switch does not add
tags to already tagged packets unless double tagging is enabled.
At the egress port, tagged packets will have their 802.1Q VLAN tags removed if un-tagging is enabled in the VLAN table
entry. Untagged packets will not be modified if 802.1Q is enabled.
4.4.3.2.2
Double Tagging
The switch supports double tagging, also known as Q-in-Q or VLAN stacking. This feature can be used for service pro-
viders to append a second VLAN tag in addition to a first VLAN tag applied by the customer. VLAN support can be
enabled either with or without double tagging. When double tagging is enabled, the outer tag is recognized and is used
for VLAN and address lookup instead of the inner tag. The outer tag precedes the inner tag in the frame header: the
outer tag is located immediately after the source address, and contains a different Tag Protocol Identifier (TPID) value
than the inner tag.
Additional controls are available for full control of the VLAN function. Some of these features can be enabled on a per-
port basis, while others are global:
• Ingress VLAN Filtering: Discard packet if VID port membership in VLAN table does not include the ingress port.
• Discard non PVID Packet: Discard packet if VID does not match the ingress port default VID.
• Discard un-tagged Packet: Discard any received packet without a tag.
• Drop tag: Drops the packet if it is VLAN tagged.
• Unknown VID Forward: Forward to a fixed set of ports if VLAN lookup fails.
• Drop unknown VID: Additional options for unknown VID packets: discard or forward to the host port.
• Null VID Replacement: Replace a null VID with the ingress port default VID.
• PVID Replacement: Replace a non-null VID with the ingress port default VID.
• Double Tag Mcast Trap: In double tag mode, trap all reserved multicast packets and forward to the host port.
4.4.3.3
VLAN Registers
Table 4-11 provides a list of VLAN related registers.
TABLE 4-11:
VLAN REGISTERS
Registers
Description
Switch Operation Register
Double tag enable
Switch Lookup Engine Control 0 Register
VLAN enable; Drop invalid VID frames
Switch Lookup Engine Control 2 Register
Trap double tagged MC frames;
Dynamic & status egress VLAN filtering
Unknown VLAN ID Control Register
Forward unknown VID
Switch MAC Control 2 Register
Null VID replacement with PVID at egress
VLAN Table Entry 0 Register,
VLAN Table Entry 1 Register,
VLAN Table Entry 2 Register,
VLAN Table Index Register,
VLAN Table Access Control Register
Read/write access to the VLAN table
Port Default Tag 0 Register,
Port Default Tag 1 Register
Port default tag
Port Ingress MAC Control Register
Drop non-VLAN frames; Tag drop
Port Transmit Queue PVID Register
PVID replacement at egress
Port Control 2 Register
VLAN table lookup for VID=0;
Ingress VLAN filtering; PVID mismatch discard



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com