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KSZ9563RNXI-TR 数据表(PDF) 72 Page - Microchip Technology

部件名 KSZ9563RNXI-TR
功能描述  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9563RNXI-TR 数据表(HTML) 72 Page - Microchip Technology

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KSZ9563R
DS00002419D-page 72
 2017-2018 Microchip Technology Inc.
5.1.2.7
LED2_0/LED2_1 Source Register
5.1.3
GLOBAL PHY CONTROL AND STATUS REGISTERS (0x0200 - 0x02FF)
5.1.3.1
Power Down Control 0 Register
5.1.3.2
LED Strap-In Register
Address:
0x0128 - 0x012B
Size:
32 bits
Bits
Description
Type
Default
31:4
RESERVED
RO
0x0000000
3
LED2_1 Source
0 = LED2_1 outputs as LED/GPIO (configured via the LED Override Register)
1 = LED2_1 outputs the GPIO_2 source
R/W
0b
2
LED2_0 Source
0 = LED2_0 outputs as LED/GPIO (configured via the LED Override Register)
1 = LED2_0 outputs the GPIO_1 source
R/W
0b
1:0
RESERVED
RO
00b
Address:
0x0201
Size:
8 bits
Bits
Description
Type
Default
7:6
RESERVED
RO
00b
5
PLL Power Down
0 = Normal operation.
1 = Disable PLL. This may be used in combination with EDPD mode – see
below.
R/W
0b
4:3
Power Management Mode
00 = Normal operation
01 = Energy Detect Power Down (EDPD) Mode
10 = Soft Power Down Mode
11 = invalid
R/W
00b
2:0
RESERVED
RO
000b
Address:
0x0210 - 0x0213
Size:
32 bits
Bits
Description
Type
Default
31:4
RESERVED
RO
0x0000000
3:0
Strap-in values of Select RXD and LED pins
[RXD2_1, RXD2_0, LED1_1, LED1_0]
RO
Note 5-2



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