KSZ9563RNXI-TR datasheet(137/226 Pages) MICROCHIP

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 2017-2018 Microchip Technology Inc.

DS00002419D-page 137

KSZ9563R

5.2.2.2

PHY Basic Status Register

PHY register 0x01.

Address:

0xN102 - 0xN103

Port N: 1-2

Size:

16 bits

Bits

Description

Type

Default

100BASE-T4

0 = PHY is not 100BASE-T4 capable

100BASE-TX Full Duplex

1 = PHY is 100BASE-TX full-duplex capable

100BASE-TX Half Duplex

1 = PHY is 100BASE-TX half-duplex capable

10 Mb/s Full Duplex

1 = PHY is 10 Mb/s full-duplex capable

10 Mb/s Half Duplex

1 = PHY is 10 Mb/s half-duplex capable

10:9

RESERVED

00b

Extended Status

1 = PHY Extended Status Register contains extended status information.

RESERVED

MF Preamble Suppression

1 = PHY will accept management frames with preamble suppressed

Auto-negotiation Complete

1 = Auto-negotiation process is complete

0 = Auto-negotiation process is not complete

Remote (Far End) Fault

1 = Remote fault condition detected

0 = No remote fault detected

Auto-Negotiation Ability

1 = PHY is able to perform auto-negotiation

Link Status

1 = Link is up

0 = Link is down

Jabber Detect

1 = Jabber condition detected

0 = No jabber condition detected

Extended Capability

1 = Supports extended capabilities register

0 = Basic register set capabilities only

KSZ9563RNXI-TR 数据表(PDF) 137 Page - Microchip Technology

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