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数据搜索系统，热门电子元器件搜索 |
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UPSD325X 数据表(PDF) 167 Page - STMicroelectronics |
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UPSD325X 数据表(HTML) 167 Page - STMicroelectronics |
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167 / 176 page  167/176 µPSD325X DEVICES Figure 86. ISC Timing Table 139. ISC Timing (5V Devices) Note: 1. For non-PLD Programming, Erase or in ISC By-pass Mode. 2. For Program or Erase PLD only. Symbol Parameter Conditions Min Max Unit tISCCF Clock (TCK, PC1) Frequency (except for PLD) (Note 1) 20 MHz tISCCH Clock (TCK, PC1) High Time (except for PLD) (Note 1) 23 ns tISCCL Clock (TCK, PC1) Low Time (except for PLD) (Note 1) 23 ns tISCCFP Clock (TCK, PC1) Frequency (PLD only) (Note 2) 2 MHz tISCCHP Clock (TCK, PC1) High Time (PLD only) (Note 2) 240 ns tISCCLP Clock (TCK, PC1) Low Time (PLD only) (Note 2) 240 ns tISCPSU ISC Port Set Up Time 7 ns tISCPH ISC Port Hold Up Time 5 ns tISCPCO ISC Port Clock to Output 21 ns tISCPZV ISC Port High-Impedance to Valid Output 21 ns tISCPVZ ISC Port Valid Output to High-Impedance 21 ns ISCCH TCK TDI/TMS ISC OUTPUTS/TDO ISC OUTPUTS/TDO t ISCCL t ISCPH t ISCPSU t ISCPVZ t ISCPZV t ISCPCO t AI02865 |
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